公开(公告)号：US20200335591A1

公开(公告)日：2020-10-22

申请号：US16386363

申请日：2019-04-17

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Michael Aquilino ,  Daniel Jaeger ,  Naved Siddiqui ,  Jessica Dechene ,  Daniel J. Dechene ,  Shreesh Narasimha ,  Natalia Borjemscaia

IPC: H01L29/417 ,  H01L27/088 ,  H01L21/311 ,  H01L21/033 ,  H01L29/40

Abstract: Structures for a field-effect transistor and methods of forming a field-effect transistor. A sidewall spacer is arranged adjacent to a sidewall of a gate electrode, a source/drain region is arranged laterally adjacent to the sidewall spacer, and a contact is arranged over the source/drain region and laterally adjacent to the sidewall spacer. The contact is coupled with the source/drain region. A section of an interlayer dielectric layer is laterally arranged between the contact and the sidewall spacer.

公开(公告)号：US09812404B2

公开(公告)日：2017-11-07

申请号：US14984547

申请日：2015-12-30

Applicant: GLOBALFOUNDRIES INC.

Inventor： Michael J. Shapiro ,  John A. Fitzsimmons ,  Natalia Borjemscaia

IPC: H01L21/70 ,  H01L23/00 ,  H01L23/528 ,  H01L21/768

CPC classification number: H01L23/562 ,  H01L21/76879 ,  H01L21/76883 ,  H01L21/76898 ,  H01L22/14 ,  H01L23/528

Abstract: The disclosure generally relates to semiconductor structures and, more particularly, to electrical connections used with crackstop structures and methods of manufacture. The structure includes: a conductive material; a dielectric material formed over the conductive material; a non-corrosive conductive material in at least one opening of the dielectric material and in direct contact with the conductive material; a crackstop structure formed over the dielectric material; and at least one of wiring layer in contact with the non-corrosive conductive material.

公开(公告)号：US20170229362A1

公开(公告)日：2017-08-10

申请号：US15017004

申请日：2016-02-05

Applicant: GLOBALFOUNDRIES INC.

Inventor： John A. Fitzsimmons ,  Michael J. Shapiro ,  Natalia Borjemscaia ,  Vincent McGahay

IPC: H01L23/26 ,  H01L23/535 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L23/26 ,  H01L23/3142 ,  H01L23/535 ,  H01L23/562 ,  H01L23/564 ,  H01L23/585 ,  H01L2924/3025 ,  H01L2924/3512

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to corrosion resistant chip sidewall connections with crackstop structures with a hermetic seal, and methods of manufacture. The structure includes: a guard ring structure surrounding an active region of an integrated circuit chip; an opening formed in the guard ring structure; and a hermetic seal encapsulating the opening and a portion of the guard ring structure, the hermetic seal being structured to prevent moisture ingress to the active region of the integrated circuit chip through the opening.

公开(公告)号：US20170194265A1

公开(公告)日：2017-07-06

申请号：US14984547

申请日：2015-12-30

Applicant: GLOBALFOUNDRIES INC.

Inventor： Michael J. Shapiro ,  John A. Fitzsimmons ,  Natalia Borjemscaia

IPC: H01L23/00 ,  H01L21/768 ,  H01L23/528

CPC classification number: H01L23/562 ,  H01L21/76879 ,  H01L21/76883 ,  H01L21/76898 ,  H01L22/14 ,  H01L23/528

Abstract: The disclosure generally relates to semiconductor structures and, more particularly, to electrical connections used with crackstop structures and methods of manufacture. The structure includes: a conductive material; a dielectric material formed over the conductive material; a non-corrosive conductive material in at least one opening of the dielectric material and in direct contact with the conductive material; a crackstop structure formed over the dielectric material; and at least one of wiring layer in contact with the non-corrosive conductive material.

公开(公告)号：US10833160B1

公开(公告)日：2020-11-10

申请号：US16386363

申请日：2019-04-17

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Michael Aquilino ,  Daniel Jaeger ,  Naved Siddiqui ,  Jessica Dechene ,  Daniel J. Dechene ,  Shreesh Narasimha ,  Natalia Borjemscaia

IPC: H01L21/768 ,  H01L21/311 ,  H01L21/82 ,  H01L21/033 ,  H01L21/027 ,  H01L21/306 ,  H01L29/417 ,  H01L27/088 ,  H01L29/40

Abstract: Structures for a field-effect transistor and methods of forming a field-effect transistor. A sidewall spacer is arranged adjacent to a sidewall of a gate electrode, a source/drain region is arranged laterally adjacent to the sidewall spacer, and a contact is arranged over the source/drain region and laterally adjacent to the sidewall spacer. The contact is coupled with the source/drain region. A section of an interlayer dielectric layer is laterally arranged between the contact and the sidewall spacer.

公开(公告)号：US09852959B2

公开(公告)日：2017-12-26

申请号：US15017004

申请日：2016-02-05

Applicant: GLOBALFOUNDRIES INC.

Inventor： John A. Fitzsimmons ,  Michael J. Shapiro ,  Natalia Borjemscaia ,  Vincent McGahay

IPC: H01L23/26 ,  H01L23/535 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L23/26 ,  H01L23/3142 ,  H01L23/535 ,  H01L23/562 ,  H01L23/564 ,  H01L23/585 ,  H01L2924/3025 ,  H01L2924/3512

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to corrosion resistant chip sidewall connections with crackstop structures with a hermetic seal, and methods of manufacture. The structure includes: a guard ring structure surrounding an active region of an integrated circuit chip; an opening formed in the guard ring structure; and a hermetic seal encapsulating the opening and a portion of the guard ring structure, the hermetic seal being structured to prevent moisture ingress to the active region of the integrated circuit chip through the opening.