公开(公告)号：US20180025936A1

公开(公告)日：2018-01-25

申请号：US15214585

申请日：2016-07-20

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Sunil K. Singh ,  Sohan S. Mehta ,  Sherjang Singh ,  Ravi P. Srivastava

IPC: H01L21/768 ,  H01L21/027 ,  H01L21/311 ,  H01L21/033

CPC classification number: H01L21/76802 ,  H01L21/0274 ,  H01L21/0332 ,  H01L21/0337 ,  H01L21/31144 ,  H01L21/76816 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/53238

Abstract: Methods of lithographic patterning to form interconnect structures for a chip. A hardmask layer is formed on a dielectric layer. A sacrificial layer is formed on the hardmask layer. First opening and second openings are formed in the sacrificial layer that extend through the sacrificial layer to the hardmask layer. A resist layer is formed on the sacrificial layer. An opening is formed in the resist layer that is laterally located between the first opening in the first sacrificial layer and the second opening in the first sacrificial layer. The resist layer is comprised of a metal oxide resist material that is removable selective to the hardmask layer.

公开(公告)号：US20180299765A1

公开(公告)日：2018-10-18

申请号：US15485498

申请日：2017-04-12

Applicant: GLOBALFOUNDRIES INC.

Inventor： SherJang Singh ,  Sunil K. Singh ,  Sohan S. Mehta

IPC: G03F1/24 ,  C23C16/02 ,  G03F1/54 ,  G03F1/52 ,  G03F1/46 ,  G03F1/80 ,  G03F1/60

Abstract: A reflective mask with an embedded absorber pattern is provided. The reflective mask may include a low thermal expansion material (LTEM) substrate. A pair of reflective stacks may be included, each reflective stack having a first respective top surface extending from the LTEM substrate to a first extent. A fill stack is between the pair of reflective stacks, the fill stack having a second top surface extending from the LTEM substrate to a second extent, the second extent being below the first extent of the pair of reflective stacks. An extended portion of each of the pair of reflective stacks is above the fill stack thereby forming a recess well between the pair of reflective stacks, the recess well having substantially vertical walls separated by the second top surface of the fill stack. An absorber layer lining the recess well.

公开(公告)号：US10353288B2

公开(公告)日：2019-07-16

申请号：US15824293

申请日：2017-11-28

Applicant: GLOBALFOUNDRIES INC.

Inventor： Vineet Sharma ,  Sohan S. Mehta ,  Craig D. Higgins ,  Sunil K. Singh ,  Feng Wang

IPC: G03B27/42 ,  G03F7/26 ,  G03F7/00 ,  G03F7/38

Abstract: A litho-litho-etch double patterning method including forming a resist layer by coating a substrate with a resist composition; exposing the resist layer to a first radiant energy density of UV rays; forming a first pattern in the resist layer by developing the resist layer with a positive developer; exposing the resist layer to a second radiant energy density of UV rays; and forming a second pattern in the resist layer by developing the resist layer with a negative developer, the second pattern including one or more features of the first pattern.

公开(公告)号：US20190163054A1

公开(公告)日：2019-05-30

申请号：US15824293

申请日：2017-11-28

Applicant: GLOBALFOUNDRIES INC.

Inventor： Vineet Sharma ,  Sohan S. Mehta ,  Craig D. Higgins ,  Sunil K. Singh ,  Feng Wang

IPC: G03F7/00 ,  G03F7/38

CPC classification number: G03F7/0035 ,  G03F7/38

Abstract: A litho-litho-etch double patterning method including forming a resist layer by coating a substrate with a resist composition; exposing the resist layer to a first radiant energy density of UV rays; forming a first pattern in the resist layer by developing the resist layer with a positive developer; exposing the resist layer to a second radiant energy density of UV rays; and forming a second pattern in the resist layer by developing the resist layer with a negative developer, the second pattern including one or more features of the first pattern.