UNIFORM EXPOSED RAISED STRUCTURES FOR NON-PLANAR SEMICONDUCTOR DEVICES
    2.
    发明申请
    UNIFORM EXPOSED RAISED STRUCTURES FOR NON-PLANAR SEMICONDUCTOR DEVICES 有权
    非平面半导体器件的均匀放大结构

    公开(公告)号:US20150380316A1

    公开(公告)日:2015-12-31

    申请号:US14319640

    申请日:2014-06-30

    Abstract: The use of two different materials for shallow trench isolation and deep structural trenches with a dielectric material therein (e.g., flowable oxide and a HARP oxide, respectively) causes non-uniform heights of exposed portions of raised semiconductor structures for non-planar semiconductor devices, due to the different etch rates of the materials. Non-uniform openings adjacent the exposed portions of the raised structures from recessing the isolation and dielectric materials are filled with additional dielectric material to create a uniform top layer of one material (the dielectric material), which can then be uniformly recessed to expose uniform portions of the raised structures.

    Abstract translation: 对于浅沟槽隔离和其中具有介电材料的深结构沟槽(例如,可流动的氧化物和HARP氧化物)分别使用两种不同的材料导致用于非平面半导体器件的凸起半导体结构的暴露部分的不均匀高度, 由于材料的蚀刻速率不同。 与凸起结构的暴露部分相邻的不均匀的开口不会使隔离和介电材料凹陷,填充有额外的电介质材料,以形成均匀的一层材料(电介质材料)的顶层,然后可将其均匀地凹入以露出均匀的部分 的凸起结构。

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