公开(公告)号：US20160204218A1

公开(公告)日：2016-07-14

申请号：US14722295

申请日：2015-05-27

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Carsten Grass ,  Robert Binder ,  Joachim Metzger

IPC: H01L29/49 ,  H01L29/78 ,  H01L29/66

CPC classification number: H01L29/4966 ,  H01L21/82345 ,  H01L21/823462 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/0847 ,  H01L29/66477 ,  H01L29/66545 ,  H01L29/78 ,  H01L29/7848

Abstract: An illustrative method includes providing a semiconductor structure. The semiconductor structure includes an active region and an electrically insulating structure. The active region includes a source region, a channel region and a drain region. The electrically insulating structure includes a recess over the channel region. A work function adjustment layer is deposited over the semiconductor structure. A portion of the work function adjustment layer is deposited at a bottom surface of the recess. The work function adjustment layer includes at least one material other than titanium nitride. A titanium nitride pre-wetting layer is deposited over the work function adjustment layer. A titanium wetting layer is deposited directly on the titanium nitride pre-wetting layer. After the deposition of the titanium wetting layer, the recess is filled with aluminum.

Abstract translation: 一种说明性的方法包括提供半导体结构。 半导体结构包括有源区和电绝缘结构。 有源区包括源极区，沟道区和漏极区。 电绝缘结构包括在通道区域上的凹部。 在半导体结构上沉积功函数调整层。 工作功能调整层的一部分沉积在凹部的底表面。 工作功能调整层包括除了氮化钛之外的至少一种材料。 氮化钛预润湿层沉积在功函数调整层上。 钛润湿层直接沉积在氮化钛预润湿层上。 在沉积钛湿润层之后，凹槽中填充有铝。

公开(公告)号：US20150214322A1

公开(公告)日：2015-07-30

申请号：US14165209

申请日：2014-01-27

Applicant: Globalfoundries Inc.

Inventor： Johannes Mueller ,  Dina H. Triyoso ,  Robert Binder ,  Joachim Metzger ,  Patrick Polakowski

IPC: H01L29/51 ,  H01L21/02 ,  H01L21/3105 ,  H01L27/115

CPC classification number: H01L29/516 ,  H01L21/02181 ,  H01L21/02186 ,  H01L21/02266 ,  H01L21/0228 ,  H01L21/28291 ,  H01L21/3105 ,  H01L27/11507 ,  H01L29/511 ,  H01L29/517 ,  H01L29/518 ,  H01L29/6684 ,  H01L29/78391

Abstract: The present disclosure provides a semiconductor device comprising a substrate, an undoped HfO2 layer formed over the substrate and a TiN layer formed on the HfO2 layer. Herein, the undoped HfO2 layer is at least partially ferroelectric. In illustrative methods for forming a semiconductor device, an undoped amorphous HfO2 layer is formed over a semiconductor substrate and a TiN layer is formed on the undoped amorphous HfO2 layer. A thermal annealing process is performed for at least partially inducing a ferroelectric phase in the undoped amorphous HfO2 layer.

Abstract translation: 本公开提供了一种半导体器件，其包括衬底，在衬底上形成的未掺杂的HfO 2层和形成在HfO 2层上的TiN层。 这里，未掺杂的HfO 2层至少部分是铁电的。 在用于形成半导体器件的说明性方法中，在半导体衬底上形成未掺杂的非晶HfO 2层，并且在未掺杂的非晶HfO 2层上形成TiN层。 进行热退火处理以至少部分地诱导未掺杂的无定形HfO 2层中的铁电相。

公开(公告)号：US08440559B2

公开(公告)日：2013-05-14

申请号：US13624235

申请日：2012-09-21

Applicant: Globalfoundries Inc.

Inventor： Markus Lenski ,  Klaus Hempel ,  Vivien Schroeder ,  Robert Binder ,  Joachim Metzger

IPC: H01L21/8234

CPC classification number: H01L21/823842 ,  H01L21/28088 ,  H01L21/82345 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7843

Abstract: Generally, the present disclosure is directed work function adjustment in high-k metal gate electrode structures. In one illustrative embodiment, a method is disclosed that includes removing a placeholder material of a first gate electrode structure and a second gate electrode structure, and forming a first work function adjusting material layer in the first and second gate electrode structures, wherein the first work function adjusting material layer includes a tantalum nitride layer. The method further includes removing a portion of the first work function adjusting material layer from the second gate electrode structure by using the tantalum nitride layer as an etch stop layer, removing the tantalum nitride layer by performing a wet chemical etch process, and forming a second work function adjusting material layer in the second gate electrode structure and above a non-removed portion of the first work function adjusting material layer in the first gate electrode structure.

Abstract translation: 通常，本公开涉及高k金属栅电极结构中的功函数调整。 在一个说明性实施例中，公开了一种方法，其包括移除第一栅极电极结构和第二栅电极结构的占位符材料，以及在第一和第二栅电极结构中形成第一功函数调节材料层，其中第一工件 功能调整材料层包括氮化钽层。 该方法还包括通过使用氮化钽层作为蚀刻停止层从第二栅极电极结构去除第一功函数调整材料层的一部分，通过执行湿化学蚀刻工艺去除氮化钽层，以及形成第二 第二栅电极结构中的功函数调整材料层，以及第一栅电极结构中的第一功函数调整材料层的未除去部分之上。

公开(公告)号：US09269785B2

公开(公告)日：2016-02-23

申请号：US14165209

申请日：2014-01-27

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Johannes Mueller ,  Dina H. Triyoso ,  Robert Binder ,  Joachim Metzger ,  Patrick Polakowski

IPC: H01L21/00 ,  H01L29/00 ,  H01L29/51 ,  H01L21/02 ,  H01L21/3105 ,  H01L27/115

CPC classification number: H01L29/516 ,  H01L21/02181 ,  H01L21/02186 ,  H01L21/02266 ,  H01L21/0228 ,  H01L21/28291 ,  H01L21/3105 ,  H01L27/11507 ,  H01L29/511 ,  H01L29/517 ,  H01L29/518 ,  H01L29/6684 ,  H01L29/78391

Abstract: The present disclosure provides a semiconductor device comprising a substrate, an undoped HfO2 layer formed over the substrate and a TiN layer formed on the HfO2 layer. Herein, the undoped HfO2 layer is at least partially ferroelectric. In illustrative methods for forming a semiconductor device, an undoped amorphous HfO2 layer is formed over a semiconductor substrate and a TiN layer is formed on the undoped amorphous HfO2 layer. A thermal annealing process is performed for at least partially inducing a ferroelectric phase in the undoped amorphous HfO2 layer.

Abstract translation: 本公开提供了一种半导体器件，其包括衬底，在衬底上形成的未掺杂的HfO 2层和形成在HfO 2层上的TiN层。 这里，未掺杂的HfO 2层至少部分为铁电体。 在用于形成半导体器件的说明性方法中，在半导体衬底上形成未掺杂的非晶HfO 2层，并且在未掺杂的非晶HfO 2层上形成TiN层。 进行热退火处理以至少部分地诱导未掺杂的无定形HfO 2层中的铁电相。

公开(公告)号：US20130017679A1

公开(公告)日：2013-01-17

申请号：US13624235

申请日：2012-09-21

Applicant: GLOBALFOUNDRIES INC.

Inventor： Markus Lenski ,  Klaus Hempel ,  Vivien Schroeder ,  Robert Binder ,  Joachim Metzger

IPC: H01L21/28

CPC classification number: H01L21/823842 ,  H01L21/28088 ,  H01L21/82345 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7843

Abstract: Generally, the present disclosure is directed work function adjustment in high-k metal gate electrode structures. In one illustrative embodiment, a method is disclosed that includes removing a placeholder material of a first gate electrode structure and a second gate electrode structure, and forming a first work function adjusting material layer in the first and second gate electrode structures, wherein the first work function adjusting material layer includes a tantalum nitride layer. The method further includes removing a portion of the first work function adjusting material layer from the second gate electrode structure by using the tantalum nitride layer as an etch stop layer, removing the tantalum nitride layer by performing a wet chemical etch process, and forming a second work function adjusting material layer in the second gate electrode structure and above a non-removed portion of the first work function adjusting material layer in the first gate electrode structure.

Abstract translation: 通常，本公开涉及高k金属栅电极结构中的功函数调整。 在一个说明性实施例中，公开了一种方法，其包括移除第一栅极电极结构和第二栅电极结构的占位符材料，以及在第一和第二栅电极结构中形成第一功函数调节材料层，其中第一工件 功能调整材料层包括氮化钽层。 该方法还包括通过使用氮化钽层作为蚀刻停止层从第二栅极电极结构去除第一功函数调整材料层的一部分，通过执行湿化学蚀刻工艺去除氮化钽层，以及形成第二 第二栅电极结构中的功函数调整材料层，以及第一栅电极结构中的第一功函数调整材料层的未除去部分之上。