公开(公告)号：US20170092653A1

公开(公告)日：2017-03-30

申请号：US15379286

申请日：2016-12-14

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Chaw Sing Ho ,  Reynaldo V. Villavelez ,  Xin Ping Cao

IPC: H01L27/11521 ,  B41J2/14 ,  H01L29/51 ,  H01L29/788 ,  H01L21/28 ,  H01L29/423

CPC classification number: H01L27/11521 ,  B41J2/1433 ,  H01L21/28273 ,  H01L27/11524 ,  H01L29/42324 ,  H01L29/513 ,  H01L29/518 ,  H01L29/788 ,  H01L29/7881

Abstract: In some examples, a fluid ejection device includes a substrate and a memory cell on the substrate, the memory cell including a first dielectric layer, a floating gate, a second dielectric layer, and a control gate. The memory cell includes a channel region between a drain region and a source region. The first dielectric layer is over the channel region and the floating gate is capacitively coupled to the channel region through the first dielectric layer. The floating gate includes a polysilicon layer, a metal layer, and a second dielectric layer between the polysilicon layer and the metal layer, where the second dielectric layer includes an opening through which the polysilicon layer is electrically connected to the metal layer.

公开(公告)号：US10336069B2

公开(公告)日：2019-07-02

申请号：US15748831

申请日：2015-10-30

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Ning Ge ,  Ser Chia Koh ,  Chaw Sing Ho ,  John Patrick Oliver

IPC: B41J2/045 ,  B41J2/14 ,  H05K1/16

Abstract: In one example, a printhead having an electrically-functional optical target. The printhead includes a substrate. An optical target having an optically-distinguishable shape and formed from at least one polysilicon strip is deposited on the substrate. An electrical connection to at least one of the polysilicon strips connect the strip into a circuit that is deposited on the substrate.

公开(公告)号：US10319728B2

公开(公告)日：2019-06-11

申请号：US15379286

申请日：2016-12-14

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Chaw Sing Ho ,  Reynaldo V. Villavelez ,  Xin Ping Cao

IPC: H01L27/11524 ,  H01L27/11521 ,  H01L29/788 ,  H01L29/423 ,  B41J2/14 ,  H01L21/28 ,  H01L29/51

Abstract: In some examples, a fluid ejection device includes a substrate and a memory cell on the substrate, the memory cell including a first dielectric layer, a floating gate, a second dielectric layer, and a control gate. The memory cell includes a channel region between a drain region and a source region. The first dielectric layer is over the channel region and the floating gate is capacitively coupled to the channel region through the first dielectric layer. The floating gate includes a polysilicon layer, a metal layer, and a second dielectric layer between the polysilicon layer and the metal layer, where the second dielectric layer includes an opening through which the polysilicon layer is electrically connected to the metal layer.

公开(公告)号：US20180222188A1

公开(公告)日：2018-08-09

申请号：US15748831

申请日：2015-10-30

Applicant: Hewlett-Packard Development Company, L.P.

Inventor： Ning Ge ,  Ser Chia Koh ,  Chaw Sing Ho ,  John Patrick Oliver

IPC: B41J2/14 ,  B41J2/045 ,  H05K1/16

CPC classification number: B41J2/14024 ,  B41J2/04543 ,  B41J2202/11 ,  H05K1/167 ,  H05K2203/013

Abstract: In one example, a printhead having an electrically-functional optical target. The printhead includes a substrate. An optical target having an optically-distinguishable shape and formed from at least one polysilicon strip is deposited on the substrate. An electrical connection to at least one of the polysilicon strips connect the strip into a circuit that is deposited on the substrate.

公开(公告)号：US09908332B2

公开(公告)日：2018-03-06

申请号：US15114967

申请日：2014-01-31

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Ning Ge ,  Adam L. Ghozeil ,  Chaw Sing Ho

IPC: B41J2/14 ,  B41J2/175 ,  B41J2/195 ,  B41J29/38

CPC classification number: B41J2/1433 ,  B41J2/14153 ,  B41J2/17566 ,  B41J2/195 ,  B41J29/38 ,  B41J2002/14354 ,  B41J2202/13

Abstract: Ink property sensing on a printhead is described. In an example, a substrate for a printhead includes a cap layer having bores. Chambers are formed beneath the cap layer in fluidic communication with the bores. Fluid ejectors are disposed in at least a portion of the chambers. At least one ion-sensitive field effect transistor (ISFET) is disposed in a respective at least one of the chambers. An electrode is disposed in each of the chambers having an ISFET and capacitively coupled to said ISFET through a dielectric.

公开(公告)号：US09457571B2

公开(公告)日：2016-10-04

申请号：US14890551

申请日：2013-06-28

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： Ning Ge ,  Chaw Sing Ho ,  Adam L. Ghozeil ,  Michael W. Cumbie

IPC: B41J2/145 ,  B41J2/16 ,  B41J2/14

CPC classification number: B41J2/145 ,  B41J2/14 ,  B41J2/14016 ,  B41J2/14129 ,  B41J2/1603 ,  B41J2/162 ,  B41J2/1626 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2202/13

Abstract: Examples of fluid ejection apparatuses and methods for making fluid ejection apparatuses are described. An example method may include forming a fluid feed slot in a bulk layer of a substrate, forming a plurality of ink feed channels in at least an epitaxial layer of the substrate, each of the ink feed channels fluidically coupled to the fluid feed slot, and forming a plurality of drop generators over the substrate such that the epitaxial layer of the substrate is between the plurality of drop generators and the bulk layer and such that the each of the drop generators is fluidically coupled to the fluid feed slot by at least one of the ink feed channels.

Abstract translation: 对流体喷射装置和制造流体喷射装置的方法进行说明。 一个示例性方法可以包括在衬底的本体层中形成流体馈送槽，在衬底的至少外延层中形成多个供墨通道，每个供墨通道流体耦合到流体供给槽，以及 在所述衬底上形成多个液滴发生器，使得所述衬底的所述外延层位于所述多个液滴发生器和所述主体层之间，并且使得所述液滴发生器中的每一个通过以下中的至少一个流体耦合到所述流体供给槽 供墨通道。