摘要:
An etchant includes about 0.1 percent by weight to about 30 percent by weight of ammonium persulfate (NH4)2S2O8, about 0.1 percent by weight to about 10 percent by weight of an inorganic acid, about 0.1 percent by weight to about 10 percent by weight of an acetate salt, about 0.01 percent by weight to about 5 percent by weight of a fluorine-containing compound, about 0.01 percent by weight to about 5 percent by weight of a sulfonic acid compound, about 0.01 percent by weight to about 2 percent by weight of an azole compound, and a remainder of water. Accordingly, the etchant may have high stability to maintain etching ability. Thus, manufacturing margins may be improved so that manufacturing costs may be reduced.
摘要翻译:蚀刻剂包括约0.1重量%至约30重量%的过硫酸铵(NH 4)2 S 2 O 8,约0.1重量%至约10重量%的无机酸,约0.1重量%至约10重量% 约0.01重量%至约5重量%的含氟化合物的乙酸盐,约0.01重量%至约5重量%的磺酸化合物,约0.01重量%至约2重量% 的唑类化合物,剩余的水。 因此,蚀刻剂可能具有高稳定性以保持蚀刻能力。 因此,可以提高制造裕度,从而可以降低制造成本。
摘要:
A gate line includes a first seed layer formed on a base substrate and a first metal layer formed on the first seed layer. A first insulation layer is formed on the base substrate. A second insulation layer is formed on the base substrate. Here, a line trench is formed through the second insulation layer in a direction crossing the gate line. A data line includes a second seed layer formed below the line trench and a second metal layer formed in the line trench. A pixel electrode is formed in a pixel area of the base substrate. Therefore, a trench of a predetermined depth is formed using an insulation layer and a metal layer is formed through a plating method, so that a metal line having a sufficient thickness may be formed.
摘要:
A gate line includes a first seed layer formed on a base substrate and a first metal layer formed on the first seed layer. A first insulation layer is formed on the base substrate. A second insulation layer is formed on the base substrate. Here, a line trench is formed through the second insulation layer in a direction crossing the gate line. A data line includes a second seed layer formed below the line trench and a second metal layer formed in the line trench. A pixel electrode is formed in a pixel area of the base substrate. Therefore, a trench of a predetermined depth is formed using an insulation layer and a metal layer is formed through a plating method, so that a metal line having a sufficient thickness may be formed.
摘要:
A method of manufacturing a display substrate is described. In the method, a gate line and a gate electrode are formed on a base substrate. A source metal layer is formed on the base substrate having the gate line and the gate electrode. A data line, a source electrode and a drain electrode are formed by etching the source metal layer by using an etching gas. An additive gas is provided to the base substrate having the drain electrode so that the additive gas reacts with an etching component of the etching gas to remove a by-product formed at an exposed portion of the data line, the source electrode and drain electrode. Thus, corrosion of the fine pattern due to an etching gas may be prevented and/or reduced.
摘要:
A display substrate includes a base substrate, a first metal pattern, a gate insulating layer, a second metal pattern, a channel layer and a pixel electrode. The first metal pattern is formed on the base substrate, and includes a gate line and a gate electrode of a switching element. The gate insulating layer is formed on the base substrate including the first metal pattern. The second metal pattern is formed on the gate insulating layer, and includes a source electrode, a drain electrode and a source line. The channel layer is formed under the second metal pattern, and is patterned to have substantially the same side surface as a side surface of the second metal pattern. The pixel electrode is electrically connected to the drain electrode. Therefore, an afterimage on a display panel, thus improving display quality.
摘要:
A gate line includes a first seed layer formed on a base substrate and a first metal layer formed on the first seed layer. A first insulation layer is formed on the base substrate. A second insulation layer is formed on the base substrate. Here, a line trench is formed through the second insulation layer in a direction crossing the gate line. A data line includes a second seed layer formed below the line trench and a second metal layer formed in the line trench. A pixel electrode is formed in a pixel area of the base substrate. Therefore, a trench of a predetermined depth is formed using an insulation layer and a metal layer is formed through a plating method, so that a metal line having a sufficient thickness may be formed.
摘要:
A thin film transistor (TFT) array panel with signal lines that have low resistivity is presented. The TFT array panel includes an insulating substrate, a gate line formed on the insulating substrate, a gate insulating layer formed on the gate line, a drain electrode and a data line having a source electrode formed on the gate insulating layer, the drain electrode facing the source electrode with a gap, and a pixel electrode connected to the drain electrode. In one embodiment, at least one of the gate line, the data line, and the drain electrode includes a first conductive layer made of a Mo-containing conductor, a second conductive layer made of a Cu-containing conductor, and a third conductive layer made of a MoN-containing conductor.
摘要:
An etchant includes about 0.1 percent by weight to about 30 percent by weight of ammonium persulfate (NH4)2S2O8, about 0.1 percent by weight to about 10 percent by weight of an inorganic acid, about 0.1 percent by weight to about 10 percent by weight of an acetate salt, about 0.01 percent by weight to about 5 percent by weight of a fluorine-containing compound, about 0.01 percent by weight to about 5 percent by weight of a sulfonic acid compound, about 0.01 percent by weight to about 2 percent by weight of an azole compound, and a remainder of water. Accordingly, the etchant may have high stability to maintain etching ability. Thus, manufacturing margins may be improved so that manufacturing costs may be reduced.
摘要翻译:蚀刻剂包括约0.1重量%至约30重量%的过硫酸铵(NH 4)2 S 2 O 8,约0.1重量%至约10重量%的无机酸,约0.1重量%至约10重量%的 约0.01重量%至约5重量%的含氟化合物的乙酸盐,约0.01重量%至约5重量%的磺酸化合物,约0.01重量%至约2重量% 的唑类化合物,剩余的水。 因此,蚀刻剂可能具有高稳定性以保持蚀刻能力。 因此,可以提高制造裕度,从而可以降低制造成本。
摘要:
A thin film transistor (TFT) array panel with signal lines that have low resistivity is presented. The TFT array panel includes an insulating substrate, a gate line formed on the insulating substrate, a gate insulating layer formed on the gate line, a drain electrode and a data line having a source electrode formed on the gate insulating layer, the drain electrode facing the source electrode with a gap, and a pixel electrode connected to the drain electrode. In one embodiment, at least one of the gate line, the data line, and the drain electrode includes a first conductive layer made of a Mo-containing conductor, a second conductive layer made of a Cu-containing conductor, and a third conductive layer made of a MoN-containing conductor.
摘要:
A thin film transistor includes a gate electrode on a substrate, a gate insulating layer on the substrate, a channel pattern, a source electrode and a drain electrode. The channel pattern includes a semiconductor pattern formed on the gate electrode and overlaying the gate electrode as well as first and second conductive adhesive patterns formed on the semiconductor pattern and spaced apart from each other. The source electrode includes a first barrier pattern, a source pattern and a first capping pattern sequentially formed on the first conductive adhesive pattern. The drain electrode includes a second barrier pattern, a drain pattern and a second capping pattern sequentially formed on the second conductive adhesive pattern. Etched portions of the first and second conductive adhesive patterns have a substantially vertical profile to prevent the exposure of the source and drain electrodes, thereby improving the characteristics of the thin film transistor.