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    Storage control system
    1.
    发明授权
    Storage control system 失效

    公开(公告)号：US3670309A

    公开(公告)日：1972-06-13

    申请号：US3670309D

    申请日：1969-12-23

    Applicant: IBM

    Inventor： AMDAHL GENE M ,  ARNOLD RICHARD F ,  DAUBER PHILIP S ,  FREIMAN CHARLES V ,  ROBELEN RUSSELL J ,  SCHORR HERBERT ,  WIERZBICKI JOHN R

    IPC: G06F13/10 ,  G06F12/08 ,  G06F13/18 ,  G11C9/00 ,  G06F13/00

    CPC classification number: G06F12/0857 ,  G06F13/18

    Abstract: Described is a storage control system for a two-level storage system. The system includes a high-speed storage against which requests for data are processed and a slower, larger-capacity main storage. Requests for data are received in terms of logical addresses. Requests can be received concurrently at a plurality of request ports where they are buffered in request stacks. A tag storage serves as an index to the data currently resident in high-speed storage, and a directory storage acts as an index to data currently in main storage. A sequence interlock generator is included which interlocks requests in the plurality of request stacks to insure that requests to the same storage area are performed in proper sequence to insure data integrity. When a request is serviced, the logical address is transformed into a plurality of physical addresses in high-speed storage. The corresponding tags from the tag storage and the corresponding data from the high-speed storage are concurrently fetched. A comparison is made of the tags with the transformed address to determine whether the requested data is in high-speed storage. Since request to the same storage entity in high-speed storage or tag storage can be made concurrently by all request ports, conflict resolvers are included to resolve conflicts arising from simultaneous requests to either of these two storages. High-speed storage is divided into storage modules capable of simultaneous operation such that requests from the plurality of request ports can be serviced concurrently. If comparison of the tags indicate that the requested data is available, the request is serviced. An interstorage transfer mechanism is included such that if the requested data is not available in high-speed storage, then the data is retrieved from main storage and placed into high-speed storage for subsequent processing of the request. Concurrently with interstorage transfer, processing of other requests from the request ports is permissible. In the replacement of data from main storage to high-speed storage, provision is made for also replacing data from high-speed storage to main storage if such be necessary.

    Data processing system
    4.
    发明授权
    Data processing system 失效

    公开(公告)号：US3400371A

    公开(公告)日：1968-09-03

    申请号：US35737264

    申请日：1964-04-06

    Applicant: IBM

    Inventor： AMDAHL GENE M ,  BLAAUW GERRIT A ,  MAGDALL ALBERT A ,  PERKINS JR CHARLES B ,  ROOD JOHN W ,  UPDIKE BRUCE M ,  VILLANTE ANTHONY E ,  HELMUT WEBER ,  BOEHM ELAINE M ,  PETER CALINGAERT ,  CARNEVALE RICHARD J ,  PAUL CASE RICHARD ,  COLLINS ARTHUR F ,  GREENE JACK E ,  HANF WILLIAM P ,  JOHNSON JACOB R

    IPC: G06F3/00 ,  G06F3/06 ,  G06F3/12 ,  G06F7/38 ,  G06F7/50 ,  G06F7/575 ,  G06F9/22 ,  G06F9/26 ,  G06F9/30 ,  G06F9/302 ,  G06F9/32 ,  G06F9/46 ,  G06F11/16 ,  G06F12/14 ,  G06F13/00 ,  G06F13/12 ,  G06F13/22 ,  G06F13/26 ,  G06F13/38 ,  G06F15/78 ,  G06F17/21

    CPC classification number: G06F7/575 ,  G06F3/00 ,  G06F3/06 ,  G06F3/12 ,  G06F7/38 ,  G06F7/50 ,  G06F9/226 ,  G06F9/26 ,  G06F9/264 ,  G06F9/30 ,  G06F9/30014 ,  G06F9/30036 ,  G06F9/30058 ,  G06F9/30094 ,  G06F9/30167 ,  G06F9/46 ,  G06F11/1641 ,  G06F12/1466 ,  G06F13/00 ,  G06F13/122 ,  G06F13/22 ,  G06F13/26 ,  G06F13/38 ,  G06F15/78 ,  G06F17/21 ,  G06F2207/3856

    Abstract: 1,061,361. Editing data. INTERNATIONAL BUSINESS MACHINES CORPORATION. Feb. 11, 1965 [April 6, 1964], No. 5906/65. Heading G4A. In an electronic data processing system, data characters to be edited are transferred selectively and successively under partial control of a bi-stable device from a first (" source ") storage field to a second (" pattern ") storage field initially containing control and data characters (e.g. decimal point), whereby at the conclusion of an editing operation the second field contains selected characters from the first field selectively interspersed with data characters of the second field. Bytes each have 8 bits and comprise two binary-coded decimal digits or one such and a sign (" packed " format), or one such digit plus 4 zone bits (" unpacked " format). Provision is made for interchanging the two halves of a byte in a register to simplify test on a half, testing being done generally by subtracting a constant from the number and seeing if the result is zero. The bi-stable device referred to above is a " significance trigger " which is 0 if the next " source " character is presumed non-significant and 1 if significant. The trigger is set to 1 if the " source " character is non-zero, or when a " significance start " control character is detected in the " pattern " field, and set to 0 when a " field separation " control character is detected. The characters of the " pattern " field are accessed from memory in turn. Those not control characters are retained in the " pattern " field if the "significance trigger " is at 1 but replaced by fill characters if at .0. " Field separation " control characters are replaced by fill characters. Detection of a " significance start " control character or a " digit select " control character results in the accessing of the. corresponding " source " character. If this is non-zero or if the "significance trigger " is at 1, it replaces the control character in the "pattern " field after being " unpacked " by insertion of zone bits 1111. Otherwise the control character is replaced by a fill character. The editing operation is initiated by an instruction word containing an OP code specifying either normal, editing as above or the latter plus the additional feature of storing the address in the "pattern " field of the highest significant character in the "source" field when this is detected through switching of the " significance trigger ". This facilitates later insertion of e.g. a currency symbol. The editing instruction word also specifies the number of bytes in the " pattern " field and the addresses of the highest order bytes of the " source " and " pattern " fields. These addresses are each specified by specifying a number and a register, the contents of the register being added to the number to get the address. Detection of a sign character in the " source " field sets to 1 a trigger to indicate that a sign is present, and if the sign is negative sets a further trigger to 1 to indicate this. This will cause the " significance trigger " to be set to 1. The second sign trigger and another trigger set to 1 in the presence of a non-zero " source " digit can be used to control subsequent (unspecified) operations. Reference has been directed by the Comptroller to Specification 954,801.

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