公开(公告)号：US3197740A

公开(公告)日：1965-07-27

申请号：US75806258

申请日：1958-08-29

Applicant: IBM

Inventor： TERLATO JOSEPH M ,  UPDIKE BRUCE M

IPC: G06F3/06 ,  G06F5/06 ,  G06F9/30 ,  G06F9/315 ,  G06F9/318 ,  G06F9/32 ,  G06F9/40 ,  G06F11/00 ,  G06F11/07 ,  G06F11/16 ,  G06F13/12 ,  G06F15/78 ,  G06F17/30

CPC classification number: G06F17/30 ,  G06F3/06 ,  G06F3/0601 ,  G06F5/06 ,  G06F5/065 ,  G06F9/30 ,  G06F9/30032 ,  G06F9/30094 ,  G06F9/30145 ,  G06F9/32 ,  G06F9/4425 ,  G06F11/0748 ,  G06F11/0769 ,  G06F11/1612 ,  G06F13/122 ,  G06F15/78 ,  G06F2003/0691 ,  G06F2003/0698

Abstract: 926,181. Digital electric calculating. INTERNATIONAL BUSINESS MACHINES CORPORATION. May 9, 1960 [June 11, 1959 (3)], No. 16245/60. Class 106 (1). In a stored programme general purpose computor an instruction word may call up at least a part of a further word, named a control word, in order to complete the information necessary that the operation specified by the instruction word be performed. The main store is a magnetic core matrix into which data from peripheral devices such as magnetic tape stores, punched cards or tape may be read in one half-word at a time and from which data being processed including instruction words is read into three registers having interchangeable functions but of which two may be combined to form upper and lower accumulators. The computer is asynchronous, the completion of one operation leading to the read-out of the instruction word for the next operation from an address specified by an instruction counter. In the main store each word comprises ten alpha-numeric, six-bit (plus parity bit) characters, each character comprising four numeric and two zone bits. An instruction or control word comprises sixteen four-bit numeric characters, compressed to fifteen by limitation of variables and stored as ten six-bit characters by utilizing the zone bits of two characters of a storage word to specify one character of an instruction or control word. Thus the zone bits of characters 0 and 1 of a storage word represent the eleventh character of an instruction and are staticized as such in a register. A data word may be of up to ten characters overlapping two adjacent storage words, and if such a condition exists, known as a split-field, an operation is preceded by assembly of the required data word in one of the registers. A data word may be distinguished by its state which is on if a bit is present in the first zone position of the character 8, off otherwise. The machine is controlled by timers to each of which is allotted a fixed number of time intervals not all of which are used for any particular operations. Thus the arithmetic timer has 28 " times " but in the add operation without split-field only times 5, possibly 6, and 24 are used. The timers jump directly to the times used in the operation being performed. Instructions: format and codes.-An instruction word which is one of the specific types listed below, is in the form of an operation code (two characters), modifier (one character), control (four characters), operand (four characters), index (four characters) and index function (one character). An input-output machine control instruction is defined by an operation code 02 (Fig. 2); the modifier specifies certain machine functions, e.g. modifier 0 will cause control simply to determine if the required machine is busy, modifier 6 will cause a tape mark to be written to indicate end of file; control is not used; operand specifies the unit to which the instruction relates; index specifies the storage address of a control word and the index function specifies the use to be made of the control word (see below). A transmit instruction causes the transmission of data between peripheral equipment and storage or within storage the data comprising a character or part of word or words taken in succession or at scattered addresses. An arithmetic instruction (Fig. 4) specifies by its operation portion the four arithmetic operations or a compare operation in which a group of characters at an address specified by the control word is compared with a group of characters set up in the registers to produce a result high, low, or equal; the modifier causes such operations as clearing the register in which the result is to be placed, rounding or treating one operand as a positive number; the operand gives the address of one of the operands, the other is given by the control word; the first two places, counting from the left, control define the amount of left shift to be given to a number word of ten characters when entered into the accumulator, or such functions as floating shift or upper accumulator which states that a word is to be placed in the upper accumulator only. Floating shift means that the amount of shift is to be taken from a significant figure indicator which shows the position of the first significant digit numbering from the left. The effect is to normalize the number. Floating shift, store, means that the amount of shift is stored at a fixed address. An indexed shift causes the amount in this fixed address to be added to the amount of shift specified. The units and tens positions of control specify the field of the word to be operated on, the tens position containing the highest order character position of the field and the units position the highest order character position of the next field. The maximum field is ten characters and if the units figure is lower than the tens figure a split field operation is indicated. A branch or jump instruction (Fig. 5) is used to specify tests and consequent conditional or unconditional jumps. The operand portion gives the address of an instruction to be executed should a jump occur. The tests are given by the control portion and may involve index, the relative magnitude of the working address of a control word to that of the end address, balance, which tests the sign or magnitude of the result of the last arithmetic operation, field, which examines the significant length of an information word in relation to the field specified, compare, an operation similar to the arithmetic compare operation, in-out, to test the result of an input-output instruction word with 0 modifier, state, to test the state (as defined above) of the last control word, and the switch tests check the setting of manual switches. The operation portion of the instruction word specifies if a jump is to be made in accordance with a predetermined state of the control word at the index address, and also includes unconditional jump and halt operations. The modifier codes relate to the state of the word at the index address, codes 4 to 7 for example specifying that the test is performed and if satisfied the word is set to a particular state after which the state is tested and the operation, jump or halt, specified by the operation code performed. The immediate cause of a jump is the state of an interrogated word, although the final cause may be a test. A logic instruction provides that all or part of any storage word may be changed for example by means of and, or, or exclusive-or comparisons between the bits of two words. Control words.-These are of three types, each having a two-character condition code, a fourcharacter reset address, a five-character working address and a five-character and address. A control word may be associated with more than one instruction word. The use of a record word is illustrated in Fig. 10, in association with a transmit instruction word. The operand specifies the tape unit from which data is to be read into store. Control specifies the address of the record word of which the working address gives the location in storage of the first data word, and the end address gives the location of the last data word. As each word is read in the working address is advanced by one and the operation stops when the working address of the record word equals the end address. An index word (Fig. 7) is used in conjunction with the index function code of an instruction word. The function code includes four main operations and combinations of them: reset, which causes the contents of the index address of the instruction word to be replaced by the contents of the reset address of the index word; index operand, which causes the working address of the word at the index address of the instruction word to be added to the operand of the instruction word, the sum being used to address storage; advance causes the working address to be incremented by one after each operation; and modify which causes storage to be addressed by the working address of the index word to obtain an operand for the operation specified by the instruction word, the working address is then added to the operand portion of the instruction and the sum replaces the working address. The condition code of an index word includes the condition end, which terminates an operation when the working and end addresses are equal, and reset, which has the same meaning as in the function code. A routine word is used to call in subroutines as a result of a branch operation. It has only two conditions, off and on, and the working address may either (1) provide the storage address of a branch instruction word by indexing the working address of the routine word with the operand of the instruction word being executed as a result of function code index operand, or (2) provide the address of a control word specifying the return address to the next main programme instruction after performance of the sub-routine; the end address may specify the address of a word in which the return address is stored. If this word is an instruction word the return address is in the operand portion, if a control word, in the working address portion. One use of a routine word in association with branch instructions is shown in Fig. 21. Instruction 1066 is a " branch if on " instruction, on referring to the word 0132 specified by the index address. The modifier (4) specifies that word 0132 is set on if the test, zero balance of a number in the accumulator, specified by control is satisfied. Operand gives the address of the first word in the sub-routine. The end address of the routine word specifies the word itself and the working address will contain the return address entered when a branch is made. If a branch is made at instruction 1066, the working address will be 01067. The sub-routine ends at instruction 2512 with an unconditional branch to the address given by adding the operand (0000) of 2512 to the working address

公开(公告)号：US3400371A

公开(公告)日：1968-09-03

申请号：US35737264

申请日：1964-04-06

Applicant: IBM

Inventor： AMDAHL GENE M ,  BLAAUW GERRIT A ,  MAGDALL ALBERT A ,  PERKINS JR CHARLES B ,  ROOD JOHN W ,  UPDIKE BRUCE M ,  VILLANTE ANTHONY E ,  HELMUT WEBER ,  BOEHM ELAINE M ,  PETER CALINGAERT ,  CARNEVALE RICHARD J ,  PAUL CASE RICHARD ,  COLLINS ARTHUR F ,  GREENE JACK E ,  HANF WILLIAM P ,  JOHNSON JACOB R

IPC: G06F3/00 ,  G06F3/06 ,  G06F3/12 ,  G06F7/38 ,  G06F7/50 ,  G06F7/575 ,  G06F9/22 ,  G06F9/26 ,  G06F9/30 ,  G06F9/302 ,  G06F9/32 ,  G06F9/46 ,  G06F11/16 ,  G06F12/14 ,  G06F13/00 ,  G06F13/12 ,  G06F13/22 ,  G06F13/26 ,  G06F13/38 ,  G06F15/78 ,  G06F17/21

CPC classification number: G06F7/575 ,  G06F3/00 ,  G06F3/06 ,  G06F3/12 ,  G06F7/38 ,  G06F7/50 ,  G06F9/226 ,  G06F9/26 ,  G06F9/264 ,  G06F9/30 ,  G06F9/30014 ,  G06F9/30036 ,  G06F9/30058 ,  G06F9/30094 ,  G06F9/30167 ,  G06F9/46 ,  G06F11/1641 ,  G06F12/1466 ,  G06F13/00 ,  G06F13/122 ,  G06F13/22 ,  G06F13/26 ,  G06F13/38 ,  G06F15/78 ,  G06F17/21 ,  G06F2207/3856

Abstract: 1,061,361. Editing data. INTERNATIONAL BUSINESS MACHINES CORPORATION. Feb. 11, 1965 [April 6, 1964], No. 5906/65. Heading G4A. In an electronic data processing system, data characters to be edited are transferred selectively and successively under partial control of a bi-stable device from a first (" source ") storage field to a second (" pattern ") storage field initially containing control and data characters (e.g. decimal point), whereby at the conclusion of an editing operation the second field contains selected characters from the first field selectively interspersed with data characters of the second field. Bytes each have 8 bits and comprise two binary-coded decimal digits or one such and a sign (" packed " format), or one such digit plus 4 zone bits (" unpacked " format). Provision is made for interchanging the two halves of a byte in a register to simplify test on a half, testing being done generally by subtracting a constant from the number and seeing if the result is zero. The bi-stable device referred to above is a " significance trigger " which is 0 if the next " source " character is presumed non-significant and 1 if significant. The trigger is set to 1 if the " source " character is non-zero, or when a " significance start " control character is detected in the " pattern " field, and set to 0 when a " field separation " control character is detected. The characters of the " pattern " field are accessed from memory in turn. Those not control characters are retained in the " pattern " field if the "significance trigger " is at 1 but replaced by fill characters if at .0. " Field separation " control characters are replaced by fill characters. Detection of a " significance start " control character or a " digit select " control character results in the accessing of the. corresponding " source " character. If this is non-zero or if the "significance trigger " is at 1, it replaces the control character in the "pattern " field after being " unpacked " by insertion of zone bits 1111. Otherwise the control character is replaced by a fill character. The editing operation is initiated by an instruction word containing an OP code specifying either normal, editing as above or the latter plus the additional feature of storing the address in the "pattern " field of the highest significant character in the "source" field when this is detected through switching of the " significance trigger ". This facilitates later insertion of e.g. a currency symbol. The editing instruction word also specifies the number of bytes in the " pattern " field and the addresses of the highest order bytes of the " source " and " pattern " fields. These addresses are each specified by specifying a number and a register, the contents of the register being added to the number to get the address. Detection of a sign character in the " source " field sets to 1 a trigger to indicate that a sign is present, and if the sign is negative sets a further trigger to 1 to indicate this. This will cause the " significance trigger " to be set to 1. The second sign trigger and another trigger set to 1 in the presence of a non-zero " source " digit can be used to control subsequent (unspecified) operations. Reference has been directed by the Comptroller to Specification 954,801.

公开(公告)号：US3077579A

公开(公告)日：1963-02-12

申请号：US75806458

申请日：1958-08-29

Applicant: IBM

Inventor： GREENE JACK E ,  TERLATO JOSEPH M ,  UPDIKE BRUCE M

IPC: G06F3/06 ,  G06F5/06 ,  G06F9/30 ,  G06F9/315 ,  G06F9/318 ,  G06F9/32 ,  G06F9/40 ,  G06F11/00 ,  G06F11/07 ,  G06F11/16 ,  G06F13/12 ,  G06F15/78 ,  G06F17/30

CPC classification number: G06F17/30 ,  G06F3/06 ,  G06F3/0601 ,  G06F5/06 ,  G06F5/065 ,  G06F9/30 ,  G06F9/30032 ,  G06F9/30094 ,  G06F9/30145 ,  G06F9/32 ,  G06F9/4425 ,  G06F11/0748 ,  G06F11/0769 ,  G06F11/1612 ,  G06F13/122 ,  G06F15/78 ,  G06F2003/0691 ,  G06F2003/0698

Abstract: 926,181. Digital electric calculating. INTERNATIONAL BUSINESS MACHINES CORPORATION. May 9, 1960 [June 11, 1959 (3)], No. 16245/60. Class 106 (1). In a stored programme general purpose computor an instruction word may call up at least a part of a further word, named a control word, in order to complete the information necessary that the operation specified by the instruction word be performed. The main store is a magnetic core matrix into which data from peripheral devices such as magnetic tape stores, punched cards or tape may be read in one half-word at a time and from which data being processed including instruction words is read into three registers having interchangeable functions but of which two may be combined to form upper and lower accumulators. The computer is asynchronous, the completion of one operation leading to the read-out of the instruction word for the next operation from an address specified by an instruction counter. In the main store each word comprises ten alpha-numeric, six-bit (plus parity bit) characters, each character comprising four numeric and two zone bits. An instruction or control word comprises sixteen four-bit numeric characters, compressed to fifteen by limitation of variables and stored as ten six-bit characters by utilizing the zone bits of two characters of a storage word to specify one character of an instruction or control word. Thus the zone bits of characters 0 and 1 of a storage word represent the eleventh character of an instruction and are staticized as such in a register. A data word may be of up to ten characters overlapping two adjacent storage words, and if such a condition exists, known as a split-field, an operation is preceded by assembly of the required data word in one of the registers. A data word may be distinguished by its state which is on if a bit is present in the first zone position of the character 8, off otherwise. The machine is controlled by timers to each of which is allotted a fixed number of time intervals not all of which are used for any particular operations. Thus the arithmetic timer has 28 " times " but in the add operation without split-field only times 5, possibly 6, and 24 are used. The timers jump directly to the times used in the operation being performed. Instructions: format and codes.-An instruction word which is one of the specific types listed below, is in the form of an operation code (two characters), modifier (one character), control (four characters), operand (four characters), index (four characters) and index function (one character). An input-output machine control instruction is defined by an operation code 02 (Fig. 2); the modifier specifies certain machine functions, e.g. modifier 0 will cause control simply to determine if the required machine is busy, modifier 6 will cause a tape mark to be written to indicate end of file; control is not used; operand specifies the unit to which the instruction relates; index specifies the storage address of a control word and the index function specifies the use to be made of the control word (see below). A transmit instruction causes the transmission of data between peripheral equipment and storage or within storage the data comprising a character or part of word or words taken in succession or at scattered addresses. An arithmetic instruction (Fig. 4) specifies by its operation portion the four arithmetic operations or a compare operation in which a group of characters at an address specified by the control word is compared with a group of characters set up in the registers to produce a result high, low, or equal; the modifier causes such operations as clearing the register in which the result is to be placed, rounding or treating one operand as a positive number; the operand gives the address of one of the operands, the other is given by the control word; the first two places, counting from the left, control define the amount of left shift to be given to a number word of ten characters when entered into the accumulator, or such functions as floating shift or upper accumulator which states that a word is to be placed in the upper accumulator only. Floating shift means that the amount of shift is to be taken from a significant figure indicator which shows the position of the first significant digit numbering from the left. The effect is to normalize the number. Floating shift, store, means that the amount of shift is stored at a fixed address. An indexed shift causes the amount in this fixed address to be added to the amount of shift specified. The units and tens positions of control specify the field of the word to be operated on, the tens position containing the highest order character position of the field and the units position the highest order character position of the next field. The maximum field is ten characters and if the units figure is lower than the tens figure a split field operation is indicated. A branch or jump instruction (Fig. 5) is used to specify tests and consequent conditional or unconditional jumps. The operand portion gives the address of an instruction to be executed should a jump occur. The tests are given by the control portion and may involve index, the relative magnitude of the working address of a control word to that of the end address, balance, which tests the sign or magnitude of the result of the last arithmetic operation, field, which examines the significant length of an information word in relation to the field specified, compare, an operation similar to the arithmetic compare operation, in-out, to test the result of an input-output instruction word with 0 modifier, state, to test the state (as defined above) of the last control word, and the switch tests check the setting of manual switches. The operation portion of the instruction word specifies if a jump is to be made in accordance with a predetermined state of the control word at the index address, and also includes unconditional jump and halt operations. The modifier codes relate to the state of the word at the index address, codes 4 to 7 for example specifying that the test is performed and if satisfied the word is set to a particular state after which the state is tested and the operation, jump or halt, specified by the operation code performed. The immediate cause of a jump is the state of an interrogated word, although the final cause may be a test. A logic instruction provides that all or part of any storage word may be changed for example by means of and, or, or exclusive-or comparisons between the bits of two words. Control words.-These are of three types, each having a two-character condition code, a fourcharacter reset address, a five-character working address and a five-character and address. A control word may be associated with more than one instruction word. The use of a record word is illustrated in Fig. 10, in association with a transmit instruction word. The operand specifies the tape unit from which data is to be read into store. Control specifies the address of the record word of which the working address gives the location in storage of the first data word, and the end address gives the location of the last data word. As each word is read in the working address is advanced by one and the operation stops when the working address of the record word equals the end address. An index word (Fig. 7) is used in conjunction with the index function code of an instruction word. The function code includes four main operations and combinations of them: reset, which causes the contents of the index address of the instruction word to be replaced by the contents of the reset address of the index word; index operand, which causes the working address of the word at the index address of the instruction word to be added to the operand of the instruction word, the sum being used to address storage; advance causes the working address to be incremented by one after each operation; and modify which causes storage to be addressed by the working address of the index word to obtain an operand for the operation specified by the instruction word, the working address is then added to the operand portion of the instruction and the sum replaces the working address. The condition code of an index word includes the condition end, which terminates an operation when the working and end addresses are equal, and reset, which has the same meaning as in the function code. A routine word is used to call in subroutines as a result of a branch operation. It has only two conditions, off and on, and the working address may either (1) provide the storage address of a branch instruction word by indexing the working address of the routine word with the operand of the instruction word being executed as a result of function code index operand, or (2) provide the address of a control word specifying the return address to the next main programme instruction after performance of the sub-routine; the end address may specify the address of a word in which the return address is stored. If this word is an instruction word the return address is in the operand portion, if a control word, in the working address portion. One use of a routine word in association with branch instructions is shown in Fig. 21. Instruction 1066 is a " branch if on " instruction, on referring to the word 0132 specified by the index address. The modifier (4) specifies that word 0132 is set on if the test, zero balance of a number in the accumulator, specified by control is satisfied. Operand gives the address of the first word in the sub-routine. The end address of the routine word specifies the word itself and the working address will contain the return address entered when a branch is made. If a branch is made at instruction 1066, the working address will be 01067. The sub-routine ends at instruction 2512 with an unconditional branch to the address given by adding the operand (0000) of 2512 to the working address