Abstract:
This specification discloses a scheme for regenerating the data in stored-charge storage cells of monolithic memories. The scheme involves the periodic reading out of the data in the storedcharge storage cells and temporarily storing the data in a regeneration cell. Thereafter the data is read out of the regeneration cell and back into the storage cell to complete the regeneration cycle.
Abstract:
This specification discloses an A.C. stable or stored charge storage cell for use in monolithic memories. The cell includes a capacitor that couples a drive line to a sense line. The capacitance of this capacitor is voltage dependent so that when charged it provides a high capacitance to couple signals on the drive line to the sense line and when discharged it provides a low capacitance to prevent the coupling of signals from the drive line to the sense line.
Abstract:
This specification discloses a polarized capacitor for use in monolithic structures, particularly those using field effect transistors. One plate of this capacitor is a metal layer overlying and insulated from a semiconductor body which has a diffusion in it adjacent to the overlying metal layer. The boundaries of this diffusion form a rectifying junction with the rest of the semiconductor body. When a voltage is applied between the metal layer and the diffusion an electric field is formed under the layer and adjacent to the diffusion so as to create an inversion layer which forms with the diffusion the second plate of the capacitor.
Abstract:
THIS SPECIFICATION DESCRIBES A SEMICONDUCTOR STORAGE CELL FOR USE IN MONOLITHIC MEMORIES. THE STORAGE CELL HAS TWO CROSSCOUPLED FET''S WHICH FUNCTION AS THE STORAGE ELEMENTS OF THE CELL. THE CROSSCOUPLED FET''S ARE ADDRESSED POWERED THROUGH INPUT-OUTPUT FET''S WHEN THE CELL IS INTERROGATED FOR READING. WHEN THE CELL IS NOT BEING SO INTERROGATED, THE CROSSCOUPLED FET''S ARE SUPPLIED POWER FROM A SOURCE WHICH IS CONNECTED TO EACH OF THE CROSSCOUPLED FET''S BY A SEPARATE LOAD FET. THE GATES OF THOSE LOAD FET''S ARE BIASED SO THE LOAD FET''S SUPPLY CHARGE TO THE CROSSCOUPLED FET''S WHILE THE STORAGE CELL IS NOT BEING INTERROGATED BUT DRAW CHARGE FROM THE CROSSCOUPLED FET''S WHEN THE CROSSCOUPLED FET''S ARE ADDRESSED FOR READING. BY BIASING THE LOAD FET''S IN THIS
MANNER, THE POTENTIAL ON THE DRAIN CAN BE REDUCED SO AS TO REDUCE THE OVERALL POWER DISSIPATION OF THE STORAGE CELL.