-
公开(公告)号：US20130207103A1
公开(公告)日：2013-08-15
申请号：US13764382
申请日：2013-02-11
Inventor： Kuan-Feng LEE
IPC: H01L29/66 , H01L29/786
CPC classification number: H01L29/66742 , H01L29/45 , H01L29/66969 , H01L29/786 , H01L29/78606 , H01L29/78618 , H01L29/7869
Abstract: An embodiment of the invention provides a manufacturing method of a thin-film transistor includes: providing a substrate; sequentially forming a gate electrode, a gate insulating layer, and an active layer on the substrate; forming an insulating metal oxide layer covering the active layer, wherein the insulating metal oxide layer including a metal oxide of a first metal; forming a metal layer covering the active layer, wherein the metal layer includes a second metal; forming a source electrode and a drain electrode on the metal layer with a trench separating therebetween; removing the metal layer exposed by the trench; and performing an annealing process to the metal layer and the insulating metal oxide layer, such that the metal layer reacts with the insulating metal oxide layer overlapping the metal layer to form a conducting composite metal oxide layer including the first metal and the second metal.
Abstract translation: 本发明的实施例提供一种薄膜晶体管的制造方法，包括：提供衬底; 在基板上依次形成栅电极，栅极绝缘层和有源层; 形成覆盖有源层的绝缘金属氧化物层，其中所述绝缘金属氧化物层包括第一金属的金属氧化物; 形成覆盖有源层的金属层，其中所述金属层包括第二金属; 在所述金属层上形成源电极和漏电极，其间分开沟槽; 去除由沟槽暴露的金属层; 对所述金属层和所述绝缘金属氧化物层进行退火处理，使得所述金属层与与所述金属层重叠的所述绝缘金属氧化物层反应，形成包含所述第一金属和所述第二金属的导电复合金属氧化物层。
-
公开(公告)号：US20150206980A1
公开(公告)日：2015-07-23
申请号：US14675973
申请日：2015-04-01
Inventor： Kuan-Feng LEE
IPC: H01L29/786 , H01L21/027 , H01L29/66
CPC classification number: H01L29/66742 , H01L21/0274 , H01L21/0334 , H01L29/66765 , H01L29/66969 , H01L29/786 , H01L29/7869
Abstract: An embodiment of the invention provides a manufacturing method of a thin film transistor substrate including: sequentially forming a gate electrode, a gate insulating layer covering the gate electrode, an active material layer, and a photo-sensitive material layer on a first substrate; performing a photolithography process by using a half tone mask to form a photo-sensitive protective layer which is above the gate electrode and has a first recess and a second recess; etching the active material layer by using the photo-sensitive protective layer as a mask to form an active layer; removing a portion of the photo-sensitive protective layer at bottoms of the first recess and the second recess to expose a first portion and a second portion of the active layer respectively; forming a first electrode connecting to the first portion; and forming a second electrode connecting to the second portion.
Abstract translation: 本发明的一个实施例提供一种薄膜晶体管衬底的制造方法，包括：在第一衬底上依次形成栅电极，覆盖栅电极的栅极绝缘层，活性材料层和光敏材料层; 通过使用半色调掩模进行光刻处理，以形成位于栅电极之上并具有第一凹部和第二凹部的感光保护层; 通过使用光敏保护层作为掩模蚀刻活性物质层以形成活性层; 在所述第一凹部和所述第二凹部的底部移除所述光敏保护层的一部分，以分别暴露所述活性层的第一部分和第二部分; 形成连接到所述第一部分的第一电极; 以及形成连接到第二部分的第二电极。
-
公开(公告)号：US20130161622A1
公开(公告)日：2013-06-27
申请号：US13722570
申请日：2012-12-20
Inventor： Kuan-Feng LEE
IPC: H01L29/786 , H01L29/66
CPC classification number: H01L29/66742 , H01L21/0274 , H01L21/0334 , H01L29/66765 , H01L29/66969 , H01L29/786 , H01L29/7869
Abstract: An embodiment of the invention provides a manufacturing method of a thin film transistor substrate including: sequentially forming a gate electrode, a gate insulating layer covering the gate electrode, an active material layer, and a photo-sensitive material layer on a first substrate; performing a photolithography process by using a half tone mask to form a photo-sensitive protective layer which is above the gate electrode and has a first recess and a second recess; etching the active material layer by using the photo-sensitive protective layer as a mask to form an active layer; removing a portion of the photo-sensitive protective layer at bottoms of the first recess and the second recess to expose a first portion and a second portion of the active layer respectively; forming a first electrode connecting to the first portion; and forming a second electrode connecting to the second portion.
Abstract translation: 本发明的一个实施例提供一种薄膜晶体管衬底的制造方法，包括：在第一衬底上依次形成栅电极，覆盖栅电极的栅极绝缘层，活性材料层和光敏材料层; 通过使用半色调掩模进行光刻处理，以形成位于栅电极之上并具有第一凹部和第二凹部的感光保护层; 通过使用光敏保护层作为掩模蚀刻活性物质层以形成活性层; 在所述第一凹部和所述第二凹部的底部移除所述光敏保护层的一部分，以分别暴露所述活性层的第一部分和第二部分; 形成连接到所述第一部分的第一电极; 以及形成连接到第二部分的第二电极。
-
公开(公告)号：US20160225879A1
公开(公告)日：2016-08-04
申请号：US15096616
申请日：2016-04-12
Inventor： Kuan-Feng LEE
IPC: H01L29/66 , H01L21/033
CPC classification number: H01L29/66742 , H01L21/0274 , H01L21/0334 , H01L29/66765 , H01L29/66969 , H01L29/786 , H01L29/7869
Abstract: The invention provides a manufacturing method of a thin film transistor substrate including: sequentially forming a gate electrode, a gate insulating layer covering the gate electrode, an active material layer, and a photo-sensitive material layer on a first substrate; performing a photolithography process by using a half tone mask to form a protective layer which is above the gate electrode and has a first recess and a second recess; wet etching the active material layer by using the protective layer as a mask to form an active layer; removing a portion of the protective layer at bottoms of the first recess and the second recess to expose a first portion and a second portion of the active layer respectively; forming a first electrode connecting to the first portion; and forming a second electrode connecting to the second portion.
Abstract translation: 本发明提供一种薄膜晶体管衬底的制造方法，包括：在第一衬底上依次形成栅电极，覆盖栅电极的栅极绝缘层，活性材料层和光敏材料层; 通过使用半色调掩模进行光刻处理以形成位于栅电极上方并具有第一凹部和第二凹部的保护层; 通过使用保护层作为掩模来湿法蚀刻活性物质层以形成活性层; 在所述第一凹部和所述第二凹部的底部移除所述保护层的一部分以分别暴露所述活性层的第一部分和第二部分; 形成连接到所述第一部分的第一电极; 以及形成连接到所述第二部分的第二电极。
-
公开(公告)号：US20250148988A1
公开(公告)日：2025-05-08
申请号：US19014771
申请日：2025-01-09
Applicant: InnoLux Corporation
Inventor： Lien-Hsiang CHEN , Kung-Chen KUO , Ming-Chun TSENG , Cheng-Hsu CHOU , Kuan-Feng LEE
IPC: G09G3/3233 , H10D86/40 , H10D86/60 , H10K59/121
Abstract: An electronic device includes a substrate, a first transistor and a second transistor. The first transistor is disposed on the substrate and has a first terminal electrically connected to a first voltage level, a second terminal and a control terminal. The second transistor is disposed on the substrate and has a first terminal electrically connected to the second terminal of the first transistor, a second terminal electrically connected to a second voltage level, and a control terminal electrically connected to the control terminal of the first transistor. Wherein a voltage value of the first voltage level is greater than a voltage value of the second voltage level.
-
Patent Agency Ranking
公开(公告)号：US20250120195A1
公开(公告)日：2025-04-10
申请号：US18985069
申请日：2024-12-18
Applicant: InnoLux Corporation
Inventor： Chandra LIUS , Kuan-Feng LEE
Abstract: An electronic device includes a substrate, a silicon semiconductor disposed on the substrate, an oxide semiconductor disposed on the substrate, a sensor configured to receive a light and output a signal, and a light-shielding element including a conductive material and disposed between the sensor and the oxide semiconductor. The oxide semiconductor is electrically connected to the silicon semiconductor. The silicon semiconductor and the oxide semiconductor are active corresponding to the signal.
-
公开(公告)号：US20250022986A1
公开(公告)日：2025-01-16
申请号：US18903541
申请日：2024-10-01
Applicant: InnoLux Corporation
Inventor： Jia-Yuan CHEN , Kuan-Feng LEE , Tsung-Han TSAI , Hsiao-Lang LIN , Jui-Jen YUEH
IPC: H01L33/44 , H01L25/075 , H01L33/22 , H01L33/32 , H01L33/38 , H01L33/46 , H01L33/50 , H01L33/56 , H01L33/62
Abstract: An electronic device includes: a semiconductor layer; a first layer disposed on the semiconductor layer, including at least one of oxygen atoms and nitrogen atoms and having a first maximum thickness; a second layer, wherein the first layer is disposed between the second layer and the semiconductor layer, and the second layer has a second maximum thickness; and a third layer, wherein the second layer is disposed between the first layer and the third layer, the third layer has a third maximum thickness, and the second maximum thickness and the third maximum thickness are greater than the first maximum thickness, wherein the first layer comprises a first position and a second position, the first position is closer to the semiconductor layer than the second position, and a first oxygen atomic percentage at the first position is less than a second oxygen atomic percentage at the second position.
-
公开(公告)号：US20250014383A1
公开(公告)日：2025-01-09
申请号：US18895325
申请日：2024-09-24
Applicant: InnoLux Corporation
Inventor： Chandra LIUS , Kuan-Feng LEE , Nai-Fang Hsu
IPC: G06V40/13 , G02F1/1333 , G02F1/1335
Abstract: An electronic device includes a first substrate, a second substrate overlapped with the first substrate and having a first side and a second side opposite to the first side, a sensor unit disposed between the first substrate and the second substrate, a first blocking layer disposed on the first side, and a second blocking layer disposed on the sensor unit. The second side is disposed between the sensor unit and the first side. The first blocking layer has a first opening, and the second blocking layer has a second opening. A width of the first opening is smaller than a width of the second opening.
-
公开(公告)号：US20240404919A1
公开(公告)日：2024-12-05
申请号：US18800801
申请日：2024-08-12
Applicant: InnoLux Corporation
Inventor： Jui-Jen YUEH , Kuan-Feng LEE , Yuan-Lin WU
IPC: H01L23/48 , H01L23/532 , H01L29/423
Abstract: An electronic device includes: a substrate including a through hole; a connecting element disposed in the through hole; a first insulating layer disposed on the substrate and including a first via; a first conductive element disposed on the first insulating layer and electrically connected to the connecting element through the first via; a second conductive element and a third conductive element disposed on the first conductive element and separated from each other by a space; a second insulating layer disposed in the space; a fourth conductive element disposed under the substrate and electrically connected to the connecting element; and a semiconductor disposed between the substrate and the first insulating layer, wherein, in a cross-sectional view of the electronic device, at least one of the second conductive element and the third conductive element is not overlapping with the connecting element.
-
公开(公告)号：US20240397750A1
公开(公告)日：2024-11-28
申请号：US18613060
申请日：2024-03-21
Applicant: InnoLux Corporation
Inventor： Chandra LIUS , Kuan-Feng LEE , Yu-Jhou GONG
IPC: H10K59/121 , H10K59/131
Abstract: This disclosure provides an electronic device including a substrate, a main electronic unit, an auxiliary electronic unit, a main working circuit and an auxiliary working circuit. The substrate has a first portion and a second portion bent with respect to the first portion, and the first portion includes a normal active region and a functional active region. The main electronic unit is disposed on the normal active region. The auxiliary electronic unit is disposed on the functional active region. The main working circuit is disposed on the first portion, and the main working circuit outputs a first driving signal to the main electronic unit according to a first data signal. The auxiliary working circuit is disposed on the second portion, and the auxiliary working circuit outputs a second driving signal to the auxiliary electronic unit according to a second data signal.
-
-
-
-
-
-
-
-
-
Search Results
249
records
(took 0.025 seconds)
