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    ON-CHIP DIFFRACTION GRATING PREPARED BY CRYSTALLOGRAPHIC WET-ETCH
    3.
    发明申请
    ON-CHIP DIFFRACTION GRATING PREPARED BY CRYSTALLOGRAPHIC WET-ETCH 审中-公开
    晶体湿蚀刻制备的芯片衍射衍射

    公开(公告)号：US20150185377A1

    公开(公告)日：2015-07-02

    申请号：US14635912

    申请日：2015-03-02

    Applicant: Intel Corporation

    Inventor： Yun-Chung Na ,  John Heck ,  Haisheng Rong

    IPC: G02B5/18 ,  G02B6/02

    CPC classification number: G02B5/1857 ,  G02B5/1842 ,  G02B5/1861 ,  G02B6/02009

    Abstract: Methods of forming microelectronic structures are described. Embodiments of those methods may include forming a photomask on a (110) silicon wafer substrate, wherein the photomask comprises a periodic array of parallelogram openings, and then performing a timed wet etch on the (110) silicon wafer substrate to form a diffraction grating structure that is etched into the (110) silicon wafer substrate.

    Abstract translation: 描述形成微电子结构的方法。 这些方法的实施例可以包括在（110）硅晶片衬底上形成光掩模，其中光掩模包括平行四边形开口的周期性阵列，然后在（110）硅晶片衬底上执行定时湿蚀刻以形成衍射光栅结构 被蚀刻到（110）硅晶片衬底中。

    Low voltage photodetectors
    5.
    发明授权
    Low voltage photodetectors 有权
    低压光电探测器

    公开(公告)号：US09224882B2

    公开(公告)日：2015-12-29

    申请号：US14129181

    申请日：2013-08-02

    Applicant: Intel Corporation

    Inventor： Yun-Chung Na ,  Han-Din Liu ,  Yimin Kang ,  Shu-Lu Chen

    IPC: H04B10/06 ,  H01L31/0216 ,  H01L31/107 ,  H01L31/0224 ,  H01L31/028 ,  H01L31/0232 ,  H01L31/108 ,  H01L31/18 ,  H04B10/60

    CPC classification number: H01L31/02161 ,  G02B6/12004 ,  H01L31/022408 ,  H01L31/02327 ,  H01L31/028 ,  H01L31/03529 ,  H01L31/107 ,  H01L31/1085 ,  H01L31/1868 ,  H01L31/1872 ,  H04B10/60 ,  Y02E10/547 ,  Y02P70/521

    Abstract: A low voltage photodetector structure including a semiconductor device layer, which may be Ge, is disposed over a substrate semiconductor, which may be Si, for example within a portion of a waveguide extending laterally within a photonic integrated circuit (PIC) chip. In exemplary embodiments where the device layer is formed over an insulator layer, the insulator layer is removed to expose a surface of the semiconductor device layer and a passivation material formed as a replacement for the insulator layer within high field regions. In further embodiments, controlled avalanche gain is achieved by spacing electrodes in a metal-semiconductor-metal (MSM) architecture, or complementary doped regions in a p-i-n architecture, to provide a field strength sufficient for impact ionization over a distance not significantly more than an order of magnitude greater than the distance that a carrier must travel so as to acquire sufficient energy for impact ionization.

    Abstract translation: 包括可以是Ge的半导体器件层的低电压光电检测器结构设置在衬底半导体上，衬底半导体可以是Si，例如在光子集成电路（PIC）芯片内横向延伸的波导的一部分内。 在其中器件层形成在绝缘体层上的示例性实施例中，去除绝缘体层以暴露半导体器件层的表面和形成为高场区域内的绝缘体层的替代物的钝化材料。 在另外的实施例中，受控的雪崩增益通过在金属 - 半导体 - 金属（MSM）结构中的电极间隔或引脚结构中的互补掺杂区域间隔来实现，以提供足够的冲击电离的场强，该距离不大于 数量级大于载体必须行进的距离，以获得足够的能量进行冲击电离。

    Optical coupler
    6.
    发明授权
    Optical coupler 有权
    光耦合器

    公开(公告)号：US09348099B2

    公开(公告)日：2016-05-24

    申请号：US14335756

    申请日：2014-07-18

    Applicant: Intel Corporation

    Inventor： Mahesh Krishnamurthi ,  Judson Ryckman ,  Haisheng Rong ,  Ling Liao ,  Harel Frish ,  Oshrit Harel ,  Assia Barkai ,  Yun-Chung Na ,  Han-Din Liu

    IPC: G02B6/12 ,  G02B6/42

    CPC classification number: G02B6/122 ,  G02B6/12002 ,  G02B6/1228 ,  G02B6/132 ,  G02B6/136 ,  G02B6/4214 ,  G02B6/4296 ,  G02B2006/12061 ,  G02B2006/121 ,  G02B2006/12104 ,  G02B2006/12147 ,  G02B2006/12152

    Abstract: Embodiments of the present disclosure are directed toward techniques and configurations for an optical coupler. In some embodiments, the device may include an optical waveguide to transmit light input from a light source. The optical waveguide may include a semiconductor layer, having a trench with one facet that comprises an edge formed under an approximately 45 degree angle and another facet formed substantially normal to the semiconductor layer. The edge may interface with another medium to form a mirror to receive inputted light and reflect received light substantially perpendicularly to propagate the received light. Other embodiments may be described and/or claimed.

    Abstract translation: 本公开的实施例涉及用于光耦合器的技术和配置。 在一些实施例中，该装置可以包括用于透射从光源输入的光的光波导。 光波导可以包括具有一个沟槽的半导体层，该沟槽包括形成在大约45度角的边缘，以及基本垂直于半导体层形成的另一个小面。 边缘可以与另一介质接合以形成反射镜以接收输入的光并且基本垂直地反射接收的光以传播接收到的光。 可以描述和/或要求保护其他实施例。

    OPTICAL COUPLER
    7.
    发明申请
    OPTICAL COUPLER 有权
    光耦合器

    公开(公告)号：US20160018610A1

    公开(公告)日：2016-01-21

    申请号：US14335756

    申请日：2014-07-18

    Applicant: Intel Corporation

    Inventor： MAHESH KRISHNAMURTHI ,  Judson Ryckman ,  Haisheng Rong ,  Ling Liao ,  Harel Frish ,  Oshrit Harel ,  Assia Barkai ,  Shu-Lu Chen ,  Yun-Chung Na ,  Han-Din Liu

    IPC: G02B6/42

    CPC classification number: G02B6/122 ,  G02B6/12002 ,  G02B6/1228 ,  G02B6/132 ,  G02B6/136 ,  G02B6/4214 ,  G02B6/4296 ,  G02B2006/12061 ,  G02B2006/121 ,  G02B2006/12104 ,  G02B2006/12147 ,  G02B2006/12152

    Abstract: Embodiments of the present disclosure are directed toward techniques and configurations for an optical coupler. In some embodiments, the device may include an optical waveguide to transmit light input from a light source. The optical waveguide may include a semiconductor layer, having a trench with one facet that comprises an edge formed under an approximately 45 degree angle and another facet formed substantially normal to the semiconductor layer. The edge may interface with another medium to form a mirror to receive inputted light and reflect received light substantially perpendicularly to propagate the received light. Other embodiments may be described and/or claimed.

    Abstract translation: 本公开的实施例涉及用于光耦合器的技术和配置。 在一些实施例中，该装置可以包括用于透射从光源输入的光的光波导。 光波导可以包括具有一个沟槽的半导体层，该沟槽包括形成在大约45度角的边缘，以及基本垂直于半导体层形成的另一个小面。 边缘可以与另一介质接合以形成反射镜以接收输入的光并且基本垂直地反射接收的光以传播接收到的光。 可以描述和/或要求保护其他实施例。

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