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公开(公告)号：US20180121365A1
公开(公告)日：2018-05-03
申请号：US15851936
申请日：2017-12-22
发明人： Vinod Bussa , Manoj Dusanapudi , Shakti Kapoor
IPC分类号： G06F12/1045 , G06F12/0831 , G06F11/263 , G06F12/1009 , G06F12/1027 , G06F12/0808
CPC分类号： G06F12/1045 , G06F11/263 , G06F12/0808 , G06F12/0833 , G06F12/1009 , G06F12/1027 , G06F2212/65 , G06F2212/657 , G06F2212/68 , G06F2212/681 , G06F2212/683
摘要： A mapping may be changed in a table stored in memory. The table may map a first set of addresses, for a set of data, to a second set of addresses. The changing of the mapping may including mapping the first set of addresses to a third set of addresses. In response to the changing of the mapping, one or more flush operations may be executed to invalidate one or more entries within one or more address translation caches. The one or more entries may include the second set of addresses. In response to the executing of the one or more flush operations, a first test case may be run. The first test case may be to test whether any of the first set of addresses are mapping to the second set of addresses.
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公开(公告)号：US09697138B2
公开(公告)日：2017-07-04
申请号：US15407126
申请日：2017-01-16
发明人： Vinod Bussa , Manoj Dusanapudi , Shakti Kapoor
IPC分类号： G06F12/10 , G06F12/1045 , G06F12/128 , G06F12/0808 , G06F12/1009 , G06F12/1027
CPC分类号： G06F12/1045 , G06F11/263 , G06F12/0808 , G06F12/0833 , G06F12/1009 , G06F12/1027 , G06F2212/65 , G06F2212/657 , G06F2212/68 , G06F2212/681 , G06F2212/683
摘要： A mapping may be changed in a table stored in memory. The table may map a first set of addresses, for a set of data, to a second set of addresses. The changing of the mapping may including mapping the first set of addresses to a third set of addresses. In response to the changing of the mapping, one or more flush operations may be executed to invalidate one or more entries within one or more address translation caches. The one or more entries may include the second set of addresses. In response to the executing of the one or more flush operations, a first test case may be run. The first test case may be to test whether any of the first set of addresses are mapping to the second set of addresses.
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公开(公告)号：US11604757B2
公开(公告)日：2023-03-14
申请号：US16513764
申请日：2019-07-17
摘要： Processing data in memory using a field programmable gate array by reading a first portion of a data set to a burst block having a first data format, transforming a sub-portion of the first portion, to an element block having a second data format, processing the sub-portion yielding a first results set, transforming the first results set to the first data format of the burst block, and writing the first results set to the burst block.
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公开(公告)号：US11188369B2
公开(公告)日：2021-11-30
申请号：US16200438
申请日：2018-11-26
发明人： Jesse Arroyo , Prathima Kommineni , Timothy Schimke , Vinod Bussa
IPC分类号： G06F9/455 , G06F9/50 , G06F9/48 , G06F11/20 , G06F9/4401
摘要： Apparatuses, methods, program products, and systems are presented for interrupt virtualization. An apparatus includes an adapter module that detects a switch from a first physical input/output (“I/O”) adapter associated with a logical partition to a second physical I/O adapter associated with the logical partition. The apparatus includes an interrupt module that updates one or more I/O interrupt management structures for the logical partition so that the logical partition receives I/O interrupt information from the second physical I/O adapter and not the first physical I/O adapter without the logical partition being aware of the switch to the second I/O adapter. The apparatus includes an abstraction module that updates physical device information at a hypervisor for the logical partition to reflect the switch to the second physical I/O device.
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公开(公告)号：US20170161209A1
公开(公告)日：2017-06-08
申请号：US15407135
申请日：2017-01-16
发明人： Vinod Bussa , Manoj Dusanapudi , Shakti Kapoor
IPC分类号： G06F12/1045 , G06F12/0808 , G06F12/1009 , G06F12/128
CPC分类号： G06F12/1045 , G06F11/263 , G06F12/0808 , G06F12/0833 , G06F12/1009 , G06F12/1027 , G06F2212/65 , G06F2212/657 , G06F2212/68 , G06F2212/681 , G06F2212/683
摘要： A mapping may be changed in a table stored in memory. The table may map a first set of addresses, for a set of data, to a second set of addresses. The changing of the mapping may including mapping the first set of addresses to a third set of addresses. In response to the changing of the mapping, one or more flush operations may be executed to invalidate one or more entries within one or more address translation caches. The one or more entries may include the second set of addresses. In response to the executing of the one or more flush operations, a first test case may be run. The first test case may be to test whether any of the first set of addresses are mapping to the second set of addresses.
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公开(公告)号：US20170161192A1
公开(公告)日：2017-06-08
申请号：US14956789
申请日：2015-12-02
发明人： Vinod Bussa , Manoj Dusanapudi , Shakti Kapoor
CPC分类号： G06F12/1045 , G06F11/263 , G06F12/0808 , G06F12/0833 , G06F12/1009 , G06F12/1027 , G06F2212/65 , G06F2212/657 , G06F2212/68 , G06F2212/681 , G06F2212/683
摘要： A mapping may be changed in a table stored in memory. The table may map a first set of addresses, for a set of data, to a second set of addresses. The changing of the mapping may including mapping the first set of addresses to a third set of addresses. In response to the changing of the mapping, one or more flush operations may be executed to invalidate one or more entries within one or more address translation caches. The one or more entries may include the second set of addresses. In response to the executing of the one or more flush operations, a first test case may be run. The first test case may be to test whether any of the first set of addresses are mapping to the second set of addresses.
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公开(公告)号：US20210357342A1
公开(公告)日：2021-11-18
申请号：US16874713
申请日：2020-05-15
摘要： Apparatuses, methods, program products, and systems are presented for interrupt migration in connection with migration of a logical partition.
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公开(公告)号：US20210019280A1
公开(公告)日：2021-01-21
申请号：US16513764
申请日：2019-07-17
IPC分类号： G06F15/78 , G06F12/0879 , G06F17/50 , G06F17/16
摘要： Processing data in memory using a field programmable gate array by reading a first portion of a data set to a burst block having a first data format, transforming a sub-portion of the first portion, to an element block having a second data format, processing the sub-portion yielding a first results set, transforming the first results set to the first data format of the burst block, and writing the first results set to the burst block.
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公开(公告)号：US09720845B2
公开(公告)日：2017-08-01
申请号：US15407135
申请日：2017-01-16
发明人： Vinod Bussa , Manoj Dusanapudi , Shakti Kapoor
IPC分类号： G06F12/10 , G06F12/1045 , G06F12/128 , G06F12/0808 , G06F12/1009 , G06F12/1027
CPC分类号： G06F12/1045 , G06F11/263 , G06F12/0808 , G06F12/0833 , G06F12/1009 , G06F12/1027 , G06F2212/65 , G06F2212/657 , G06F2212/68 , G06F2212/681 , G06F2212/683
摘要： A mapping may be changed in a table stored in memory. The table may map a first set of addresses, for a set of data, to a second set of addresses. The changing of the mapping may including mapping the first set of addresses to a third set of addresses. In response to the changing of the mapping, one or more flush operations may be executed to invalidate one or more entries within one or more address translation caches. The one or more entries may include the second set of addresses. In response to the executing of the one or more flush operations, a first test case may be run. The first test case may be to test whether any of the first set of addresses are mapping to the second set of addresses.
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公开(公告)号：US20170161208A1
公开(公告)日：2017-06-08
申请号：US15407126
申请日：2017-01-16
发明人： Vinod Bussa , Manoj Dusanapudi , Shakti Kapoor
IPC分类号： G06F12/1045 , G06F12/0808 , G06F12/1009 , G06F12/128
CPC分类号： G06F12/1045 , G06F11/263 , G06F12/0808 , G06F12/0833 , G06F12/1009 , G06F12/1027 , G06F2212/65 , G06F2212/657 , G06F2212/68 , G06F2212/681 , G06F2212/683
摘要： A mapping may be changed in a table stored in memory. The table may map a first set of addresses, for a set of data, to a second set of addresses. The changing of the mapping may including mapping the first set of addresses to a third set of addresses. In response to the changing of the mapping, one or more flush operations may be executed to invalidate one or more entries within one or more address translation caches. The one or more entries may include the second set of addresses. In response to the executing of the one or more flush operations, a first test case may be run. The first test case may be to test whether any of the first set of addresses are mapping to the second set of addresses.
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