公开(公告)号：US12191316B2

公开(公告)日：2025-01-07

申请号：US18439855

申请日：2024-02-13

Applicant: Japan Display Inc.

Inventor： Tatsuya Toda ,  Toshinari Sasaki ,  Masayoshi Fuchi

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1368 ,  G09G3/3225 ,  G09G3/3266 ,  H10K59/12 ,  H10K59/123 ,  H10K59/124 ,  H10K59/131

Abstract: A semiconductor device including: a first gate electrode; a first gate insulating layer on the first gate electrode; a first oxide semiconductor layer on the first insulating layer; source and drain electrodes connected to the first oxide semiconductor layer; a second gate insulating layer on the first oxide semiconductor layer; a second oxide semiconductor layer on the second gate insulating layer; a second gate electrode on the second oxide semiconductor layer, the second gate electrode being in contact with the second oxide semiconductor layer; a first insulating layer on the second gate electrode, the first insulating layer having a part of a first aperture overlapping with the second oxide semiconductor layer in a planar view; and a first connecting electrode electrically connecting the first gate electrode and the second gate electrode via the first aperture.

公开(公告)号：US20200321359A1

公开(公告)日：2020-10-08

申请号：US16906569

申请日：2020-06-19

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA ,  Masayoshi Fuchi

IPC: H01L27/12 ,  H01L21/02 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L29/786

Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first semiconductor layer located above the insulating substrate, a second semiconductor layer located above the insulating substrate, an insulating layer which covers the first semiconductor layer and the second semiconductor layer, and includes a first contact hole reaching the first semiconductor layer and a second contact hole reaching the second semiconductor layer, a barrier layer which covers one of the first semiconductor layer inside the first contact hole and the second semiconductor layer inside the second contact hole, and a first conductive layer which is in contact with the barrier layer.

公开(公告)号：US20160149046A1

公开(公告)日：2016-05-26

申请号：US14944676

申请日：2015-11-18

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA ,  Masayoshi Fuchi ,  Hajime Watakabe ,  Takashi Okada ,  Arichika Ishiba

IPC: H01L29/786 ,  H01L21/467 ,  H01L29/66 ,  H01L29/423 ,  H01L29/24

CPC classification number: H01L29/7869 ,  H01L21/467 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78696

Abstract: According to one embodiment, a thin-film transistor and a method of manufacturing the thin-film transistor provided herein achieve enhanced reliability by preventing a disconnection in a gate insulating film at a position corresponding to an end surface of an oxide semiconductor layer. The oxide semiconductor layer includes a channel region, a source region, and a drain region. The channel region is placed between the source region and the drain region. The gate insulating film covers the oxide semiconductor layer in a range from at least a part of an upper surface to an end surface continuous with the upper surface of the oxide semiconductor layer. The oxide semiconductor layer is formed so as to have an oxygen concentration that becomes lower from a top side to a bottom side and the end surface is inclined so as to diverge from the top side to the bottom side.

Abstract translation: 根据一个实施例，本文提供的薄膜晶体管和制造薄膜晶体管的方法通过防止栅极绝缘膜在与氧化物半导体层的端面相对应的位置处的断开而实现增强的可靠性。 氧化物半导体层包括沟道区，源极区和漏极区。 沟道区域放置在源极区域和漏极区域之间。 栅极绝缘膜在从上表面至与氧化物半导体层的上表面连续的端面的至少一部分的范围内覆盖氧化物半导体层。 氧化物半导体层形成为具有从上侧到底侧变低的氧浓度，并且端面倾斜以从顶侧向底侧发散。

公开(公告)号：US11271020B2

公开(公告)日：2022-03-08

申请号：US16906569

申请日：2020-06-19

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada ,  Masayoshi Fuchi

IPC: H01L27/12 ,  H01L21/02 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L29/786

Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first semiconductor layer located above the insulating substrate, a second semiconductor layer located above the insulating substrate, an insulating layer which covers the first semiconductor layer and the second semiconductor layer, and includes a first contact hole reaching the first semiconductor layer and a second contact hole reaching the second semiconductor layer, a barrier layer which covers one of the first semiconductor layer inside the first contact hole and the second semiconductor layer inside the second contact hole, and a first conductive layer which is in contact with the barrier layer.

公开(公告)号：US09780227B2

公开(公告)日：2017-10-03

申请号：US14944676

申请日：2015-11-18

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada ,  Masayoshi Fuchi ,  Hajime Watakabe ,  Takashi Okada ,  Arichika Ishida

IPC: H01L29/10 ,  H01L29/786 ,  H01L29/423 ,  H01L29/66 ,  H01L21/467

CPC classification number: H01L29/7869 ,  H01L21/467 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78696

Abstract: According to one embodiment, a thin-film transistor and a method of manufacturing the thin-film transistor provided herein achieve enhanced reliability by preventing a disconnection in a gate insulating film at a position corresponding to an end surface of an oxide semiconductor layer. The oxide semiconductor layer includes a channel region, a source region, and a drain region. The channel region is placed between the source region and the drain region. The gate insulating film covers the oxide semiconductor layer in a range from at least a part of an upper surface to an end surface continuous with the upper surface of the oxide semiconductor layer. The oxide semiconductor layer is formed so as to have an oxygen concentration that becomes lower from a top side to a bottom side and the end surface is inclined so as to diverge from the top side to the bottom side.

公开(公告)号：US10396187B2

公开(公告)日：2019-08-27

申请号：US15880673

申请日：2018-01-26

Applicant: Japan Display Inc.

Inventor： Toshinari Sasaki ,  Masahiro Watabe ,  Masayoshi Fuchi ,  Isao Suzumura ,  Marina Shiokawa

IPC: H01L29/66 ,  H01L21/385 ,  H01L29/786 ,  H01L21/477

Abstract: A semiconductor device including a first oxide insulating layer, a barrier layer above the first oxide insulating layer, the barrier layer including an opening, a second oxide insulating layer above the first oxide insulating layer at a position overlapping the opening, an oxide semiconductor layer facing the first oxide insulating layer interposed by the second oxide insulating layer at a position overlapping the opening, a gate electrode facing the oxide semiconductor layer at side opposite to the first oxide insulating layer with respect to the oxide semiconductor layer, and a gate insulating layer between the oxide semiconductor layer and the gate electrode. A contained amount of oxygen in the first oxide insulating layer is larger than a contained amount of oxygen in the second oxide insulating layer.

公开(公告)号：US09337322B2

公开(公告)日：2016-05-10

申请号：US14729117

申请日：2015-06-03

Applicant: Japan Display Inc.

Inventor： Masato Hiramatsu ,  Masayoshi Fuchi ,  Arichika Ishida

IPC: H01L29/66 ,  H01L29/786 ,  H01L29/49 ,  H01L21/02 ,  H01L21/465

CPC classification number: H01L29/7869 ,  H01L21/02164 ,  H01L21/02211 ,  H01L21/02214 ,  H01L21/02271 ,  H01L21/02565 ,  H01L21/0262 ,  H01L21/443 ,  H01L21/465 ,  H01L29/24 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78696

Abstract: According to one embodiment, a thin-film transistor comprises an oxide semiconductor layer formed on a part of a substrate, a first gate insulator film of a silicon dioxide film formed on the oxide semiconductor layer and by the CVD method with a silane-based source gas, a second gate insulator film of a silicon dioxide film formed on the first gate insulator film by the CVD method with a TEOS source gas, and a gate electrode formed on the second gate insulator film.

Abstract translation: 根据一个实施例，薄膜晶体管包括形成在衬底的一部分上的氧化物半导体层，形成在氧化物半导体层上的二氧化硅膜的第一栅极绝缘膜和通过CVD法的硅烷基源 气体，通过CVD法用TEOS源气体形成在第一栅极绝缘膜上的二氧化硅膜的第二栅极绝缘膜，以及形成在第二栅极绝缘膜上的栅电极。

公开(公告)号：US12237342B2

公开(公告)日：2025-02-25

申请号：US18509459

申请日：2023-11-15

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada ,  Masayoshi Fuchi

IPC: H01L27/12 ,  H01L21/02 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L29/786

Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first semiconductor layer located above the insulating substrate, a second semiconductor layer located above the insulating substrate, an insulating layer which covers the first semiconductor layer and the second semiconductor layer, and includes a first contact hole reaching the first semiconductor layer and a second contact hole reaching the second semiconductor layer, a barrier layer which covers one of the first semiconductor layer inside the first contact hole and the second semiconductor layer inside the second contact hole, and a first conductive layer which is in contact with the barrier layer.

公开(公告)号：US10707242B2

公开(公告)日：2020-07-07

申请号：US16200157

申请日：2018-11-26

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada ,  Masayoshi Fuchi

IPC: H01L27/12 ,  H01L21/02 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L29/786

Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first semiconductor layer located above the insulating substrate, a second semiconductor layer located above the insulating substrate, an insulating layer which covers the first semiconductor layer and the second semiconductor layer, and includes a first contact hole reaching the first semiconductor layer and a second contact hole reaching the second semiconductor layer, a barrier layer which covers one of the first semiconductor layer inside the first contact hole and the second semiconductor layer inside the second contact hole, and a first conductive layer which is in contact with the barrier layer.

公开(公告)号：US10276601B2

公开(公告)日：2019-04-30

申请号：US15682594

申请日：2017-08-22

Applicant: Japan Display Inc.

Inventor： Noriyoshi Kanda ,  Arichika Ishida ,  Masayoshi Fuchi

IPC: H01L27/12 ,  H01L51/00 ,  H01L51/50

Abstract: According to one embodiment, a display device includes an insulating substrate, a first transistor including a first semiconductor layer of silicon and a first electrode, a first insulating layer provided above the first semiconductor layer, a second transistor including a second semiconductor layer of an oxide semiconductor, a second electrode and a conductive layer electrically connected to the second semiconductor layer, and a second insulating layer provided above the first insulating layer and the second semiconductor layer, the first electrode being electrically connected to the first semiconductor layer in a first hole, and the second electrode being in contact with the conductive layer in a second hole.