摘要:
A semiconductor device provides a gate structure that includes a conductive portion and a high-k dielectric material formed beneath and along sides of the conductive material. An additional gate dielectric material such as a gate oxide may be used in addition to the high-k dielectric material. The method for forming the structure includes forming an opening in an organic material, forming the high-k dielectric material and a conductive material within the opening and over the organic material then using chemical mechanical polishing to remove the high-k dielectric material and conductive material from regions outside the gate region.
摘要:
A semiconductor device provides a gate structure that includes a conductive portion and a high-k dielectric material formed beneath and along sides of the conductive material. An additional gate dielectric material such as a gate oxide may be used in addition to the high-k dielectric material. The method for forming the structure includes forming an opening in an organic material, forming the high-k dielectric material and a conductive material within the opening and over the organic material then using chemical mechanical polishing to remove the high-k dielectric material and conductive material from regions outside the gate region.
摘要:
Methods and structures for forming a contact hole structure are disclosed. These methods first form a substantially silicon-free material layer over a substrate. A material layer is formed over the substantially silicon-free material layer. A contact hole is formed within the substantially silicon-free material layer and the material layer without substantially damaging the substrate. In addition, a conductive layer is formed in the contact hole so as to form a contact structure.
摘要:
Semiconductor devices and methods for fabricating the same. The semiconductor device includes a resistance-reduced transistor with metallized bilayer overlying source/drain regions and gate electrode thereof. A first dielectric layer with a conductive contact overlies the resistance-reduced transistor. A second dielectric layer having a first conductive feature overlies the first dielectric layer. A third dielectric layer with a second conductive feature overlies the second dielectric layer, forming a conductive pathway down to the top surface of the metallized bilayer over one of the source/drain regions or the gate electrode layer.
摘要:
A semiconductor structure includes a substrate, and a first MOS device on the first region of the substrate wherein the first MOS device includes a first spacer liner. The semiconductor structure further includes a second MOS device on the second region wherein the second MOS device includes a second spacer liner. A first stressed film having a first thickness is formed over the first MOS device and directly on the first spacer liner. A second stressed film having a second thickness is formed over the second MOS device and directly on the second spacer liner. The first and the second stressed films may be formed of a same material.
摘要:
A multiple gate region FET device for forming up to 6 FET devices and method for forming the same, the device including a multiple fin shaped structure comprising a semiconductor material disposed on a substrate; said multiple fin shaped structure comprising substantially parallel spaced apart sidewall portions, each of said sidewall portions comprising major inner and outer surfaces and an upper surface; wherein, each of said surfaces comprises a surface for forming an overlying field effect transistor (FET).
摘要:
A method of forming an opening on a low-k dielectric layer using a polysilicon hard mask rather than a metal hard mask as used in prior art. A polysilicon hard mask is formed over a low-k dielectric layer and a photoresist layer is formed over the polysilicon hard mask. The photoresist layer is patterned and the polysilicon hard mask is etched with a gas plasma to create exposed portions of the low-k dielectric layer. The photoresist layer in stripped prior to the etching of the exposed portions of the low-k dielectric layer to avoid damage to the low-k dielectric layer.
摘要:
A resistance-reduced semiconductor device and fabrication thereof. The semiconductor device of the invention includes a semiconductor device body exposing at least one silicon-containing portion, a metal silicide layer with a first resistivity overlying the silicon-containing portion and a conductor layer with a second resistivity overlying the metal silicide layer, wherein the second resistivity is smaller than the first resistivity.
摘要:
Methods and structures for forming a contact hole structure are disclosed. These methods first form a substantially silicon-free material layer over a substrate. A material layer is formed over the substantially silicon-free material layer. A contact hole is formed within the substantially silicon-free material layer and the material layer without substantially damaging the substrate. In addition, a conductive layer is formed in the contact hole so as to form a contact structure.
摘要:
Semiconductor devices and methods for fabricating the same. The semiconductor device includes a resistance-reduced transistor with metallized bilayer overlying source/drain regions and gate electrode thereof. A first dielectric layer with a conductive contact overlies the resistance-reduced transistor. A second dielectric layer having a first conductive feature overlies the first dielectric layer. A third dielectric layer with a second conductive feature overlies the second dielectric layer, forming a conductive pathway down to the top surface of the metallized bilayer over one of the source/drain regions or the gate electrode layer.