公开(公告)号：US20040262610A1

公开(公告)日：2004-12-30

申请号：US10663765

申请日：2003-09-17

Applicant: LG.Philips LCD Co., Ltd.

Inventor： Dae Hyun Nam

IPC: H01L029/04

CPC classification number: H01L27/1214 ,  H01L27/124 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/42384 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627 ,  H01L29/78696

Abstract: A thin film transistor includes a substrate, a crystallized semiconductor layer formed over the substrate having a channel region, low-density impurity regions and high-density impurity regions, a gate insulating layer formed on the crystallized semiconductor layer, a first gate electrode formed on the gate insulating layer having a width corresponding to the channel region, a second gate electrode formed on the first gate electrode and on the gate insulating layer such that the second gate electrode overlaps the low-density impurity regions and a source electrode and a drain electrode respectively contacting the high-density impurity regions.

Abstract translation: 薄膜晶体管包括基板，在具有沟道区域的基板上形成的结晶半导体层，低密度杂质区域和高密度杂质区域，形成在结晶化半导体层上的栅极绝缘层，形成在第一栅电极 所述栅绝缘层具有对应于所述沟道区的宽度，第二栅电极，形成在所述第一栅极上和所述栅绝缘层上，使得所述第二栅电极与所述低密度杂质区重叠，以及源电极和漏电极 分别接触高浓度杂质区域。

公开(公告)号：US20020086469A1

公开(公告)日：2002-07-04

申请号：US09998311

申请日：2001-12-03

Applicant: LG.Philips LCD Co., Ltd.

Inventor： Binn Kim ,  Hae Yeol Kim ,  Dae Hyun Nam

IPC: H01L021/00 ,  H01L021/84

CPC classification number: H01L21/02672 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02667 ,  H01L27/1277 ,  H01L27/1285 ,  H01L29/66757 ,  H01L29/78675

Abstract: A method for fabricating a thin film transistor includes forming a buffer layer on a substrate, forming a first amorphous silicon layer on the buffer layer, forming a plurality of metal clusters on the first amorphous silicon layer, forming a second amorphous silicon layer on the metal clusters including the first amorphous silicon layer, and simultaneously applying a heat-treatment and an electrical field to crystallize the first and the second amorphous silicon layers.

Abstract translation: 一种制造薄膜晶体管的方法，包括在衬底上形成缓冲层，在缓冲层上形成第一非晶硅层，在第一非晶硅层上形成多个金属簇，在金属上形成第二非晶硅层 包括第一非晶硅层的簇，并且同时施加热处理和电场以使第一和第二非晶硅层结晶。