Abstract:
For each current image output from a pixel matrix, the digital words relative to at least one masked line of the matrix are processed to generate a current correction digital code. From this code, a black level compensation signal is generated and applied as an offset control on pixel signal amplification. If the current correct digital code does not differ from the code calculated for a previous image output by a predetermined amount, then the code for the previous image is instead used to generate the black level compensation signal.
Abstract:
A device for correcting the reset noise and/or the fixed pattern noise of an active pixel comprising a photosensitive element, the device comprising a transmission circuit connecting the photosensitive element to a correction node and operating with a first or a second transmission gain; a circuit for providing a correction voltage equal to the sum of a constant voltage and of the noise multiplied by an amplification gain equal to the inverse of the difference between the first and second transmission gains; and a correction circuit capable of bringing the correction node from the constant voltage to the correction voltage, the transmission circuit having the first transmission gain, and of bringing the correction node to the constant voltage, the transmission circuit having the second transmission gain.
Abstract:
A device for correcting the reset noise and/or the fixed pattern noise of an active pixel comprising a photosensitive element, the device comprising a transmission circuit connecting the photosensitive element to a correction node and operating with a first or a second transmission gain; a circuit for providing a correction voltage equal to the sum of a constant voltage and of the noise multiplied by an amplification gain equal to the inverse of the difference between the first and second transmission gains; and a correction circuit capable of bringing the correction node from the constant voltage to the correction voltage, the transmission circuit having the first transmission gain, and of bringing the correction node to the constant voltage, the transmission circuit having the second transmission gain.
Abstract:
For each current image output from a pixel matrix, the digital words relative to at least one masked line of the matrix are processed to generate a current correction digital code. From this code, a black level compensation signal is generated and applied as an offset control on pixel signal amplification. If the current correct digital code does not differ from the code calculated for a previous image output by a predetermined amount, then the code for the previous image is instead used to generate the black level compensation signal.
Abstract:
A chainable adder receives bits (A, B, C) to give complementary sum outputs (SO, SO*) and carry outputs (CO, CO*). A first stage has differential pairs (P1, P2, P3) receiving bits (A, B, C), respectively, and complements (A*, B*, C*), respectively. The pairs have common output arms and are powered by an identical current (I). First and second output arms include resistors (R1, R2, R3) and (R4, R5, R6), respectively, connected-in-series to a reference potential (M). The resistors define intermediate nodes (A1, A2, A3) in the first arm, (B1, B2, B3) in the second arm. Carry outputs are taken at nodes (A2, B2). A second stage has differential pairs (P4, P5, P6) whose inputs are connected to nodes (A1, B3) for pair (P4), (A2, B2) for pair (P5), and (A3, B1) for pair (P6). Pairs (P4, P6) each have a common arm with the pair (P5) and a non-common arm. The sum outputs are constituted by a combination, according to an “OR” function, of logic states on the non-common arm of one of pairs (P4, P6) and on the common arm of another of pairs (P4, P6).
Abstract:
An image sensor includes an active pixel, an amplifier stage, and a voltage-limiting stage. The active pixel is configured to generate an information signal. The amplifier stage is coupled to the active pixel and configured to amplify the information signal. The voltage-limiting stage is coupled to the amplifier stage and includes a current shunting device and a gain device. The current shunting device has a first terminal connected to an output of the amplifier stage, a second terminal connected to a reference voltage node, and a control terminal. The gain device is connected to the control terminal of the current shunting device and configured to decrease the voltage span required to cause the current shunting device to enter into a current shunting mode.
Abstract:
A method of analog to digital voltage conversion including: generating a quadratic signal based on an analog time varying reference signal; generating a ramp signal based on the quadratic signal; and converting an analog input voltage to a digital output value based on a time duration determined by a comparison of the analog input voltage with the ramp signal.
Abstract:
Image sensor, comprising a matrix of active pixels having several columns for delivering at least one information signal of an active pixel, the sensor comprising means for processing the information signals delivered by the said active pixels which comprise at least one amplification stage biased by a current source, the processing means comprising a device for voltage-limiting the signal delivered on an output terminal of the said at least one amplification stage comprising an input terminal connected to the output terminal, a first transistor connected between the input terminal and a reference terminal connected to a reference power supply source, a gain device comprising an input connected to the input terminal, an output connected to the gate of the first transistor and configured so as to decrease the voltage span necessary to cause the first transistor to toggle from its off state to a state in which it absorbs the current provided by the said current source.
Abstract:
A low-noise CMOS active pixel for image sensors comprises a photosensitive element (PD), a feedback capacitive element (CF) with a capacitance CF, and four transistors, namely a first transistor (M1), two reset transistors (M3, M4) and one pixel selection transistor (M2). These components are laid out and controlled in such a way that the first transistor (M1) is mounted as an amplifier during the pixel reset phase and as a follower during the read phase. The reset transistors (M3, M4) are parallel-connected so that one of them (M4) compensates for the negative effects of the other transistor (M3) on the node common to the two transistors.
Abstract:
A method of analog-to-digital conversion over n bits of an analog signal, including the steps of: comparing the amplitude of the analog signal with a threshold representing the amplitude of the full-scale analog signal divided by 2k, where k is an integer smaller than n; performing an analog-to-digital conversion of the analog signal over n−k bits to obtain the n−k most significant bits of a binary word over n bits if the result of the comparison step indicates that the amplitude of the input signal is greater than the threshold, and the n−k least significant bits of this binary word otherwise. An analog-to-digital converter and its application to image sensors.