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公开(公告)号:US20210344782A1
公开(公告)日:2021-11-04
申请号:US17198292
申请日:2021-03-11
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Yuval Shpigelman , Idan Burstein , Aviv Kfir , Liron Mula , Niv Aibester , Gil Levy
IPC: H04L29/06 , H04L12/801 , H04L1/00
Abstract: A network element includes circuitry and multiple ports. The multiple ports are configured to connect to a communication network. The circuitry is configured to receive via one of the ports a packet that originated from a source node and is destined to a destination node, the packet including a mark that is indicative of a cumulative state derived from at least bandwidth utilization conditions of output ports that were traversed by the packet along a path, from the source node up to the network element, to select a port for forwarding the packet toward the destination node, to update the mark of the packet based at least on a value of the mark in the received packet and on a local bandwidth utilization condition of the selected port, and to transmit the packet having the updated mark to the destination node via the selected port.
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公开(公告)号:US11973696B2
公开(公告)日:2024-04-30
申请号:US17588385
申请日:2022-01-31
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Niv Aibester , Barak Gafni
IPC: H04L49/103 , H04L45/122 , H04L47/30 , H04L49/9005 , H04L49/9047
CPC classification number: H04L49/103 , H04L45/122 , H04L47/30 , H04L49/9005 , H04L49/9047
Abstract: A network device includes one or more ports, a packet processor, and a memory management circuit. The one or more ports are to communicate packets over a network. The packet processor is to process the packets using a plurality of queues. The memory management circuit is to maintain a shared buffer in a memory and adaptively allocate memory resources from the shared buffer to the queues, to maintain in the memory, in addition to the shared buffer, a shared-reserve memory pool for use by a defined subset of the queues, to identify in the subset a queue that (i) requires additional memory resources, (ii) is not eligible for additional allocation from the shared buffer, and (iii) meets an eligibility condition for the shared-reserve memory pool, and to allocate memory resources to the identified queue from the shared-reserve memory pool.
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公开(公告)号:US11622028B2
公开(公告)日:2023-04-04
申请号:US17198292
申请日:2021-03-11
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Yuval Shpigelman , Idan Burstein , Aviv Kfir , Liron Mula , Niv Aibester , Gil Levy
Abstract: A network element includes circuitry and multiple ports. The multiple ports are configured to connect to a communication network. The circuitry is configured to receive via one of the ports a packet that originated from a source node and is destined to a destination node, the packet including a mark that is indicative of a cumulative state derived from at least bandwidth utilization conditions of output ports that were traversed by the packet along a path, from the source node up to the network element, to select a port for forwarding the packet toward the destination node, to update the mark of the packet based at least on a value of the mark in the received packet and on a local bandwidth utilization condition of the selected port, and to transmit the packet having the updated mark to the destination node via the selected port.
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公开(公告)号:US20220368639A1
公开(公告)日:2022-11-17
申请号:US17869821
申请日:2022-07-21
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Niv Aibester , Aviv Kfir , Gil Levy , Liron Mula
IPC: H04L47/20
Abstract: Apparatus for global policing of a bandwidth of a flow, the apparatus including a network device including a local policer configured to perform bandwidth policing on the flow within the network device, and a communications module configured to: send local policer state information from the local policer to a remote global policer, and receive policer state information from the remote global policer and update the local policer state information based on the remote global policer state information. Related apparatus and methods are also provided.
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公开(公告)号:US20220239766A1
公开(公告)日:2022-07-28
申请号:US17160407
申请日:2021-01-28
Applicant: Mellanox Technologies, Ltd.
Inventor: Liron Mula , Aviv Kfir , Amir Mizrahi , Niv Aibester
IPC: H04L29/06 , H04L12/861 , H04L12/931
Abstract: A parsing apparatus includes an interface, a first parser, a second parser and a controller. The interface is configured to receive packets belonging to a plurality of predefined packet types. The first parser is configured to identify any of the packet types. The second parser is configured to identify only a partial subset of the packet types. The controller is configured to receive a packet via the interface, to attempt identifying a packet type of the received packet using the second parser, and in response to detecting that identifying the packet type using the second parser fails, to revert to identify the packet type of the received packet using the first parser.
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公开(公告)号:US20240370074A1
公开(公告)日:2024-11-07
申请号:US18309842
申请日:2023-05-01
Applicant: Mellanox Technologies, Ltd.
Inventor: Amit Kazimirsky , Eyal Srebro , Niv Aibester , George Elias
IPC: G06F1/3206
Abstract: A device includes one or more ports, one or more bandwidth shapers, and processing logic. The one or more ports are to connect to a communication network. A given bandwidth shaper is to: (i) when disabled, output traffic at an available full data rate, and (ii) when enabled, output the traffic at a specified shaper data rate lower than the available full data rate. The processing logic is to receive or generate notifications, which are indicative of average power that is consumed by the network device while outputting traffic through the one or more bandwidth shapers via the one or more ports, and based on at least some of the notifications, toggle at least one of the one or more bandwidth shapers between being enabled and disabled, to retain the average power consumed below a specified power budget.
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公开(公告)号:US20230138522A1
公开(公告)日:2023-05-04
申请号:US17516731
申请日:2021-11-02
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Niv Aibester , Barak Gafni , Aviv Kfir , Gil Levy
IPC: G06F3/06
Abstract: A network device includes a memory and a memory management circuit. The memory is to store a shared buffer. The memory management circuit is to estimate respective bandwidth measures for one or more queues used in processing packets in the network device, and to allocate and deallocate segments of the shared buffer to at least one of the queues based on the bandwidth measures.
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公开(公告)号:US20230022037A1
公开(公告)日:2023-01-26
申请号:US17955591
申请日:2022-09-29
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Niv Aibester , Aviv Kfir , Gil Levy , Liron Mula , Barak Gafni
IPC: H04L49/90 , H04L43/0876 , H04L47/6275
Abstract: An apparatus for controlling a Shared Buffer (SB), the apparatus including an interface and a SB controller. The interface is to access flow-based data counts and admission states. The SB controller is to perform flow-based accounting of packets received by a network device coupled to a communication network, for producing flow-based data counts, each flow-based data count associated with one or more respective flows, and to generate admission states based at least on the flow-based data counts, each admission state being generated from one or more respective flow-based data counts.
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公开(公告)号:US12229439B1
公开(公告)日:2025-02-18
申请号:US18229509
申请日:2023-08-02
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Niv Aibester , Eyal Srebro , Liron Mula , Amit Kazimirsky
IPC: G06F3/06 , G06F1/3234 , H04L49/90
Abstract: A network device, a network interface controller, and a switch are provided. In one example, a shared buffer includes a plurality of cells of memory, one or more ports read data from the shared buffer and write data to the shared buffer, and a controller circuit selectively enables and disables cells of memory of the shared buffer based on an amount of data stored in the shared buffer. Power consumption of the shared buffer is in proportion to a number of enabled cells of memory.
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公开(公告)号:US20240073151A1
公开(公告)日:2024-02-29
申请号:US17893835
申请日:2022-08-23
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Niv Aibester , Gil Levy , Aviv Kfir
IPC: H04L47/62 , H04L43/0882 , H04L47/2441 , H04L47/80 , H04L49/103
CPC classification number: H04L47/621 , H04L43/0882 , H04L47/2441 , H04L47/801 , H04L49/103
Abstract: A networking device and system are described, among other things. An illustrative system is disclosed to include a shared buffer and at least a flow controller. In some embodiments, the system and/or flow controller may be configured to measure a packet flow's bandwidth consumption of the shared buffer, assign a flow-type attribute to the packet flow based on the packet flow's bandwidth consumption of the shared buffer, select a shared buffer schema for the packet flow based on the flow-type attribute assigned to the packet flow, and apply the selected shared buffer schema to the packet flow. For example, the flow-type attribute assigned to the packet flow may comprise a mice flow state or an elephant flow state, and a reserve attribute may be assigned to the flow based on the packet flow being assigned the mice flow state or the elephant flow state.
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