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    SMART NOSE WITH MACHINE LEARNING
    3.
    发明公开
    SMART NOSE WITH MACHINE LEARNING 审中-公开

    公开(公告)号：US20240272703A1

    公开(公告)日：2024-08-15

    申请号：US18438912

    申请日：2024-02-12

    Applicant: Micron Technology, Inc.

    Inventor： Priya Vemparala Guruswamy ,  Barbara J. Bailey ,  Marsela Pontoh ,  Aparna U. Limaye ,  Tejas Jagadeesh

    IPC: G06F3/01 ,  G01N33/00 ,  G06V10/10

    CPC classification number: G06F3/011 ,  G01N33/0034 ,  G06V10/10

    Abstract: Methods, apparatuses, and systems associated with a smart nose with machine learning are described. A system can include a smart nose device configured to receive an odor and create a first odor vector associated with the odor. The system can include an image detection device configured to receive a plurality of images while the odor is received and identify a plurality of objects within the plurality of images. The system can also include a computing device to refine the first odor vector based on the identified plurality of objects, create, utilizing a machine learning model, a second odor vector based on the refined first odor vector and an odor pattern database, and predict the odor based on the second odor vector.

    SURFACE CLEANING
    4.
    发明申请
    SURFACE CLEANING 有权

    公开(公告)号：US20220400924A1

    公开(公告)日：2022-12-22

    申请号：US17354179

    申请日：2021-06-22

    Applicant: Micron Technology, Inc.

    Inventor： Priya Vemparala Guruswamy ,  Chunhua Yao ,  Anshika Sharma ,  Xiao Li ,  Cipriana Forgy

    IPC: A47L9/28 ,  A47L11/28 ,  A47L11/40

    Abstract: Methods and apparatuses associated with surface cleaning are described. Examples can include detecting at a processing resource of a robot and via a temperature sensor of the robot, a temperature of a surface on which the robot is located. Examples can include the processing resource shutting down the robot in response to the temperature being at or above a particular threshold temperature, and the processing resource instructing the robot to clean the surface following a particular cleaning path using a vacuum, a scrubber, or both in response to the temperature being below a particular threshold temperature.

    EMERGENCY ASSISTANCE RESPONSE
    5.
    发明申请
    EMERGENCY ASSISTANCE RESPONSE 有权

    公开(公告)号：US20220198902A1

    公开(公告)日：2022-06-23

    申请号：US17147508

    申请日：2021-01-13

    Applicant: Micron Technology, Inc.

    Inventor： Chunhua Yao ,  Priya Vemparala Guruswamy ,  Xiao Li ,  Cipriana Forgy ,  Anshika Sharma

    IPC: G08B21/04 ,  G08B21/18 ,  G06F9/54

    Abstract: Methods, systems, and non-transitory machine-readable media associated with an emergency assistance response are described. A system for an emergency assistance response can include a non-transitory machine-readable medium comprising a processing resource in communication with a memory resource having instructions executable to receive signaling associated with monitored health data. The instructions can be executable to track the received signaling, identify, output data representative of abnormal health data based on the tracked received signaling, and transmit the output data to a wearable device. The wearable device can receive the output data representative of the abnormal health data, provide a prompt via a user interface to a wearer of the wearable device associated with the abnormal health data, determine a response to the abnormal health data based on a reply or non-reply from the wearer via the user interface, and transmit the response to the processing resource.

    Erase operation with electron injection for reduction of cell-to-cell interference in a memory sub-system
    6.
    发明授权
    Erase operation with electron injection for reduction of cell-to-cell interference in a memory sub-system 有权

    公开(公告)号：US12211548B2

    公开(公告)日：2025-01-28

    申请号：US18085986

    申请日：2022-12-21

    Applicant: Micron Technology, Inc.

    Inventor： Hong-Yan Chen ,  Priya Vemparala Guruswamy ,  Pamela Castalino ,  Tomoko Ogura Iwasaki

    IPC: G11C11/00 ,  G11C11/56 ,  G11C16/08

    Abstract: Control logic in a memory device cause a programming pulse to be applied to a set of wordlines including a first set of even-numbered wordlines corresponding to a first set of memory cells to be erased and a second set of odd-numbered wordlines corresponding to a second set of memory cells to be erased, where a set of electrons are injected into a first set of gate regions, a second set of gate regions, and a set of inter-cell regions of a charge trap (CT) layer of the memory device. The control logic executes a first erase cycle on the first set of even-numbered wordlines to remove a first subset of electrons from the first set of gate regions corresponding to the first set of even-numbered wordlines. The control logic executes a second erase cycle on the second set of odd-numbered wordlines to remove a second subset of electrons from the second set of gate regions corresponding to the second set of even-numbered wordlines.

    ERASE OPERATION WITH ELECTRON INJECTION FOR REDUCTION OF CELL-TO-CELL INTERFERENCE IN A MEMORY SUB-SYSTEM
    8.
    发明公开
    ERASE OPERATION WITH ELECTRON INJECTION FOR REDUCTION OF CELL-TO-CELL INTERFERENCE IN A MEMORY SUB-SYSTEM 审中-公开

    公开(公告)号：US20230206999A1

    公开(公告)日：2023-06-29

    申请号：US18085986

    申请日：2022-12-21

    Applicant: Micron Technology, Inc.

    Inventor： Hong-Yan Chen ,  Priya Vemparala Guruswamy ,  Pamela Castalino ,  Tomoko Ogura Iwasaki

    IPC: G06F3/06

    CPC classification number: G06F3/0619 ,  G06F3/0679 ,  G06F3/0652

    Abstract: Control logic in a memory device cause a programming pulse to be applied to a set of wordlines including a first set of even-numbered wordlines corresponding to a first set of memory cells to be erased and a second set of odd-numbered wordlines corresponding to a second set of memory cells to be erased, where a set of electrons are injected into a first set of gate regions, a second set of gate regions, and a set of inter-cell regions of a charge trap (CT) layer of the memory device. The control logic executes a first erase cycle on the first set of even-numbered wordlines to remove a first subset of electrons from the first set of gate regions corresponding to the first set of even-numbered wordlines. The control logic executes a second erase cycle on the second set of odd-numbered wordlines to remove a second subset of electrons from the second set of gate regions corresponding to the second set of even-numbered wordlines.

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