Abstract:
Methods, systems, and devices for variable density storage device are described. A memory system may receive a write command to write data to the memory system. The memory system may write the data to a first set of memory cells of the memory system using a first write operation based on receiving the write command. The first set of memory cells store three or fewer bits of information in a single memory cell. The memory system may identify whether to transfer the data to a second set of memory cells on one or more parameters associated with the data. The second set of memory cells may store more bits of information in a single memory cell than the first set of memory cells. The memory system may transfer the data to the second set of memory cells based on identifying that the data is to be transferred.
Abstract:
A program operation on a subset of a plurality of memory cells is performed. A sense operation on the subset of the plurality of memory cells is performed to determine respective values stored in the subset of the plurality of memory cells. One or more patterns of pre-programmed memory cells of the memory device are identified. The one or more patterns comprise representations of values of the pre-programmed memory cells when at least one of a first temperature criterion or a second temperature criterion is satisfied. The respective values of the subset of the plurality of memory cells are compared to the values of the pre-programmed memory cells in the one or more patterns. Based on the comparison, a reading from a thermal sensor coupled to the memory device is determined to satisfy an accuracy criterion.
Abstract:
Systems and methods for modifying a usage limit of a data storage device include a host interface; integrated circuit memory cells; and a processing device coupled to the host interface to provide commands with addresses to access the integrated circuit memory cells according to the address, and configured to execute firmware to perform: operations requested by commands received via the host interface; and updates to a usage limit of the data storage device.
Abstract:
Systems and methods for modifying a usage limit of a data storage device include a host interface; integrated circuit memory cells; and a processing device coupled to the host interface to provide commands with addresses to access the integrated circuit memory cells according to the address, and configured to execute firmware to perform: operations requested by commands received via the host interface; and updates to a usage limit of the data storage device.
Abstract:
Methods, systems, and devices for memory device heating in cold environments are described. A memory system may use system components to accelerate the heating of a non-volatile memory device that stores boot data associated with a boot up procedure at a host system. For example, the memory system may determine that a temperature associated with the memory system fails to satisfy a threshold. Based on the temperature failing to satisfy the threshold, a controller of the memory system may perform a heating procedure that increases a heat of and emitted by the controller (e.g., a heating element coupled with the controller) to accelerate the heating of the non-volatile memory device. The memory system may read the boot data from the non-volatile memory device based on the heating procedure and transmit the boot data to the host system.
Abstract:
A multi-interface memory can include a memory package that includes a memory device and host interfaces coupled to the memory device. Each of the host interfaces is configured to operate according to a different protocol. The memory package can be coupled to a host via one or more of the host interfaces. More than one of the host interfaces can share a contact.
Abstract:
Respective values of a subset of the plurality of memory cells of a memory device are compared to a pattern of pre-programmed memory cells. The pattern pre-programmed memory cells comprise representations of values of the pattern of pre-programmed memory cells when a temperature criterion is satisfied. Responsive to determining that at least a threshold number of the respective values of the subset matches the pattern of pre-programmed memory cells, a temperature reading from a thermal sensor coupled to the memory device is identified. Responsive to determining that the temperature reading does not correspond to a temperature criterion, determining that the thermal sensor has failed.
Abstract:
Respective values of a subset of the plurality of memory cells of a memory device are compared to a pattern of pre-programmed memory cells. The pattern pre-programmed memory cells comprise representations of values of the pattern of pre-programmed memory cells when a temperature criterion is satisfied. Responsive to determining that at least a threshold number of the respective values of the subset matches the pattern of pre-programmed memory cells, a temperature reading from a thermal sensor coupled to the memory device is identified. Responsive to determining that the temperature reading does not correspond to a temperature criterion, determining that the thermal sensor has failed.
Abstract:
A program operation on a subset of a plurality of memory cells is performed. A sense operation on the subset of the plurality of memory cells is performed to determine respective values stored in the subset of the plurality of memory cells. One or more patterns of pre-programmed memory cells of the memory device are identified. The one or more patterns comprise representations of values of the pre-programmed memory cells when at least one of a first temperature criterion or a second temperature criterion is satisfied. The respective values of the subset of the plurality of memory cells are compared to the values of the pre-programmed memory cells in the one or more patterns. Based on the comparison, a reading from a thermal sensor coupled to the memory device is determined to satisfy an accuracy criterion.
Abstract:
Embodiments include but are not limited to apparatuses and systems including semiconductor packages, e.g. memory packages, having an interposer including at least one topological feature, such as a depression in a surface of the interposer, a die coupled to the surface of the interposer, and an encapsulant material formed over the die and the interposer, and disposed in the at least one depression to resist movement of the encapsulant material relative to the interposer. Other embodiments may be described and claimed.