公开(公告)号：US20240062829A1

公开(公告)日：2024-02-22

申请号：US17888781

申请日：2022-08-16

Applicant: Micron Technology, Inc.

Inventor： Ugo Russo ,  Karan Banerjee ,  Shyam Sunder Raghunathan

IPC: G11C16/26

CPC classification number: G11C16/26

Abstract: Methods, systems, and devices for transient and stable state read operations of a memory device are described. A memory system may implement a read operation including a delay if a channel is at stable state, and may implement a read operation without a delay if the channel is in a transient state. Upon receiving a read command to a set of memory cells sharing the channel, the memory system may determine whether the channel is in a stable or transient state. If the channel is in a stable state, the memory system may perform a read operation including a delay between boosting the channel and driving respective word lines, such that the channel partially discharges prior to driving the word lines. If the channel is in a transient state, the memory system may perform a read operation without a delay between boosting the channel and driving the word lines.

公开(公告)号：US20240312529A1

公开(公告)日：2024-09-19

申请号：US18602960

申请日：2024-03-12

Applicant: Micron Technology, Inc.

Inventor： Karan Banerjee ,  Waing Pyie Soe ,  Shyam Sunder Raghunathan

IPC: G11C16/26 ,  G11C16/04 ,  G11C16/08

CPC classification number: G11C16/26 ,  G11C16/0433 ,  G11C16/08

Abstract: Control logic in a memory device receives a request to perform a corrective read operation on one or more memory cells associated with a selected wordline of a memory array of a memory device and determines whether one or more memory cells associated with an adjacent wordline of the memory array are in an erased state. Responsive to determining that the one or more memory cells associated with the adjacent wordline are in the erased state, the control logic identifies a partial block read voltage offset value and causes a read voltage modified according to the partial block read voltage offset value to be applied to the selected wordline to perform the corrective read operation on the one or more memory cells associated with the selected wordline.

公开(公告)号：US12224016B2

公开(公告)日：2025-02-11

申请号：US17888781

申请日：2022-08-16

Applicant: Micron Technology, Inc.

Inventor： Ugo Russo ,  Karan Banerjee ,  Shyam Sunder Raghunathan

IPC: G11C16/26

Abstract: A memory system may implement a read operation including a delay if a channel is at stable state, and may implement a read operation without a delay if the channel is in a transient state. Upon receiving a read command to a set of memory cells sharing the channel, the memory system may determine whether the channel is in a stable or transient state. If the channel is in a stable state, the memory system may perform a read operation including a delay between boosting the channel and driving respective word lines, such that the channel partially discharges prior to driving the word lines. If the channel is in a transient state, the memory system may perform a read operation without a delay between boosting the channel and driving the word lines.

公开(公告)号：US20250006292A1

公开(公告)日：2025-01-02

申请号：US18440619

申请日：2024-02-13

Applicant: Micron Technology, Inc.

Inventor： Taylor Alu ,  Nicola Ciocchini ,  Shyam Sunder Raghunathan ,  Guang Hu ,  Walter Di Francesco ,  Umberto Siciliani ,  Violante Moschiano ,  Karan Banerjee

IPC: G11C29/52 ,  G11C16/20 ,  G11C16/34

Abstract: A method includes detecting a change in a memory control signal of a memory device including memory blocks, determining based at least on the change in the memory control signal that the memory device is in a stable state, and responsive to determining that the memory device is in the stable state, associating a voltage offset bin with at least one memory block of the memory device.