中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

56 records (took 0.014 seconds)

    Firmware assisted error handling scheme
    1.
    发明授权
    Firmware assisted error handling scheme 有权
    固件辅助错误处理方案

    公开(公告)号：US08448024B2

    公开(公告)日：2013-05-21

    申请号：US11804105

    申请日：2007-05-16

    Applicant: Mohan Kumar ,  Sarathy Jayakumar

    Inventor： Mohan Kumar ,  Sarathy Jayakumar

    IPC: G06F11/00

    CPC classification number: G06F11/34 ,  G06F11/0706 ,  G06F11/0769

    Abstract: A firmware assisted error handling scheme in a computer system has been disclosed. In one embodiment, firmware is used to access one or more hardware-specific error registers within the computer system in response to a system management interrupt (SMI) trap. Using the firmware, an error record in a common error record format is constructed. The error record is made available to an operating system (OS) within the computer system.

    Abstract translation: 已经公开了计算机系统中的固件辅助错误处理方案。 在一个实施例中，响应于系统管理中断（SMI）陷阱，固件用于访问计算机系统内的一个或多个硬件特定的错误寄存器。 使用固件，构建一个常见错误记录格式的错误记录。 错误记录可用于计算机系统内的操作系统（OS）。

    Firmware assisted error handling scheme
    3.
    发明申请
    Firmware assisted error handling scheme 有权
    固件辅助错误处理方案

    公开(公告)号：US20080288815A1

    公开(公告)日：2008-11-20

    申请号：US11804105

    申请日：2007-05-16

    Applicant: Mohan Kumar ,  Sarathy Jayakumar

    Inventor： Mohan Kumar ,  Sarathy Jayakumar

    IPC: G06F11/07

    CPC classification number: G06F11/34 ,  G06F11/0706 ,  G06F11/0769

    Abstract: A firmware assisted error handling scheme in a computer system has been disclosed. In one embodiment, firmware is used to access one or more hardware-specific error registers within the computer system in response to a system management interrupt (SMI) trap. Using the firmware, an error record in a common error record format is constructed. The error record is made available to an operating system (OS) within the computer system.

    Abstract translation: 已经公开了计算机系统中的固件辅助错误处理方案。 在一个实施例中，响应于系统管理中断（SMI）陷阱，固件用于访问计算机系统内的一个或多个硬件特定的错误寄存器。 使用固件，构建一个常见错误记录格式的错误记录。 错误记录可用于计算机系统内的操作系统（OS）。

    FIRMWARE ASSISTED ERROR HANDLING SCHEME
    4.
    发明申请
    FIRMWARE ASSISTED ERROR HANDLING SCHEME 有权
    固件协助错误处理方案

    公开(公告)号：US20130254602A1

    公开(公告)日：2013-09-26

    申请号：US13891022

    申请日：2013-05-09

    Applicant: Mohan Kumar ,  Sarathy Jayakumar

    Inventor： Mohan Kumar ,  Sarathy Jayakumar

    IPC: G06F11/34

    CPC classification number: G06F11/34 ,  G06F11/0706 ,  G06F11/0769

    Abstract: A firmware assisted error handling scheme in a computer system has been disclosed. In one embodiment, firmware is used to access one or more hardware-specific error registers within the computer system in response to a system management interrupt (SMI) trap. Using the firmware, an error record in a common error record format is constructed. The error record is made available to an operating system (OS) within the computer system.

    Abstract translation: 已经公开了计算机系统中的固件辅助错误处理方案。 在一个实施例中，响应于系统管理中断（SMI）陷阱，固件用于访问计算机系统内的一个或多个硬件特定的错误寄存器。 使用固件，构建一个常见错误记录格式的错误记录。 错误记录可用于计算机系统内的操作系统（OS）。

    Methods and apparatus for generating system management interrupts
    8.
    发明授权
    Methods and apparatus for generating system management interrupts 有权
    产生系统管理中断的方法和装置

    公开(公告)号：US07725637B2

    公开(公告)日：2010-05-25

    申请号：US11967299

    申请日：2007-12-31

    Applicant: Mohan Kumar ,  Sarathy Jayakumar ,  Sham M Datta

    Inventor： Mohan Kumar ,  Sarathy Jayakumar ,  Sham M Datta

    IPC: G06F13/24

    CPC classification number: G06F9/4812

    Abstract: A method includes determining a plurality of memory addresses, each memory address being different from one another. The method further includes generating a plurality of system management interrupt interprocessor interrupts, each system management interrupt interprocessor interrupt having a corresponding processor in a plurality of processors in a system and each system management interrupt interprocessor interrupt including one of the plurality of memory addresses. The method further includes directing each system management interrupt interprocessor interrupt to the corresponding processor. An associated machine readable medium is also disclosed.

    Abstract translation: 一种方法包括确定多个存储器地址，每个存储器地址彼此不同。 该方法还包括产生多个系统管理中断处理器中断，每个系统管理中断处理器中断在系统中的多个处理器中具有对应的处理器，并且每个系统管理中断处理器中断包括多个存储器地址之一。 该方法还包括将每个系统管理中断处理器中断引导到相应的处理器。 还公开了一种相关的机器可读介质。

    Autonomous initialization of non-volatile random access memory in a computer system
    9.
    发明授权
    Autonomous initialization of non-volatile random access memory in a computer system 有权
    计算机系统中非易失性随机存取存储器的自动初始化

    公开(公告)号：US09378133B2

    公开(公告)日：2016-06-28

    申请号：US13997945

    申请日：2011-09-30

    Applicant: Murugasamy K. Nachimuthu ,  Mohan Kumar ,  Dimitrios Ziakas

    Inventor： Murugasamy K. Nachimuthu ,  Mohan Kumar ,  Dimitrios Ziakas

    IPC: G06F12/02 ,  G06F9/44

    CPC classification number: G06F12/0246 ,  G06F9/4403

    Abstract: A non-volatile random access memory (NVRAM) is used in a computer system to store information that allows the NVRAM to autonomously initialize itself at power-on. The computer system includes a processor, an NVRAM controller coupled to the processor, and an NVRAM that comprises the NVRAM controller. The NVRAM is byte-rewritable and byte-erasable by the processor. The NVRAM stores a memory interface table containing information for the NVRAM controller to autonomously initialize the NVRAM upon power-on of the computer system without interacting with the processor and firmware outside of the NVRAM. The information is provided by the NVRAM controller to the processor to allow the processor to access the NVRAM.

    Abstract translation: 在计算机系统中使用非易失性随机存取存储器（NVRAM）来存储允许NVRAM在上电时自动初始化的信息。 计算机系统包括处理器，耦合到处理器的NVRAM控制器和包括NVRAM控制器的NVRAM。 NVRAM是字节可重写的，可由处理器字节擦除。 NVRAM存储包含NVRAM控制器的信息的存储器接口表，用于在计算机系统上电时自动初始化NVRAM，而不与NVRAM之外的处理器和固件交互。 该信息由NVRAM控制器提供给处理器，以允许处理器访问NVRAM。

    AUTONOMOUS INITIALIZATION OF NON-VOLATILE RANDOM ACCESS MEMORY IN A COMPUTER SYSTEM
    10.
    发明申请
    AUTONOMOUS INITIALIZATION OF NON-VOLATILE RANDOM ACCESS MEMORY IN A COMPUTER SYSTEM 有权
    计算机系统中非易失性随机存取存储器的自动初始化

    公开(公告)号：US20130304980A1

    公开(公告)日：2013-11-14

    申请号：US13997945

    申请日：2011-09-30

    Applicant: Murugasamy K. Nachimuthu ,  Mohan Kumar ,  Dimitrios Ziakas

    Inventor： Murugasamy K. Nachimuthu ,  Mohan Kumar ,  Dimitrios Ziakas

    IPC: G06F12/02

    CPC classification number: G06F12/0246 ,  G06F9/4403

    Abstract: A non-volatile random access memory (NVRAM) is used in a computer system to store information that allows the NVRAM to autonomously initialize itself at power-on. The computer system includes a processor, an NVRAM controller coupled to the processor, and an NVRAM that comprises the NVRAM controller. The NVRAM is byte-rewritable and byte-erasable by the processor. The NVRAM stores a memory interface table containing information for the NVRAM controller to autonomously initialize the NVRAM upon power-on of the computer system without interacting with the processor and firmware outside of the NVRAM. The information is provided by the NVRAM controller to the processor to allow the processor to access the NVRAM.

    Abstract translation: 在计算机系统中使用非易失性随机存取存储器（NVRAM）来存储允许NVRAM在上电时自动初始化的信息。 计算机系统包括处理器，耦合到处理器的NVRAM控制器和包括NVRAM控制器的NVRAM。 NVRAM是字节可重写的，可由处理器字节擦除。 NVRAM存储包含NVRAM控制器的信息的存储器接口表，用于在计算机系统上电时自动初始化NVRAM，而不与NVRAM之外的处理器和固件交互。 该信息由NVRAM控制器提供给处理器，以允许处理器访问NVRAM。

Patent Agency Ranking