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公开(公告)号:US20170170122A1
公开(公告)日:2017-06-15
申请号:US15356527
申请日:2016-11-18
Applicant: NXP B.V.
Inventor: Hans-Martin Ritter , Joachim Utzig , Frank Burmeister , Godfried Henricus Josephus Notermans , Jochen Wynants , Rainer Mintzlaff
IPC: H01L23/538 , H01L29/06 , H01L21/78
CPC classification number: H01L23/3171 , H01L21/78 , H01L23/291 , H01L23/3192 , H01L23/5386 , H01L29/0649 , H01L29/2003 , H01L29/205 , H01L29/402 , H01L29/66212 , H01L29/66462 , H01L29/7786 , H01L29/872
Abstract: A semiconductor device and a method of making the same. The device includes a substrate comprising a major surface and a backside. The device also includes a dielectric partition for electrically isolating a first part of the substrate from a second part of the substrate. The dielectric partition extends through the substrate from the major surface to the backside.
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公开(公告)号:US20160104700A1
公开(公告)日:2016-04-14
申请号:US14848003
申请日:2015-09-08
Applicant: NXP B.V.
CPC classification number: H01L27/0255 , H01L27/0262 , H01L27/067 , H01L29/0626 , H01L29/7416 , H01L29/7436 , H01L29/87
Abstract: The present disclosure relates to an electrostatic discharge (ESD) protection device. The electrostatic discharge protection device, may comprise: a semiconductor controlled rectifier; and a p-n diode. The semiconductor controlled rectifier and the diode may be integrally disposed laterally at a major surface of a semiconductor substrate; and a current path for the semiconductor controlled rectifier may be separate from a current path for the diode.
Abstract translation: 本公开涉及一种静电放电(ESD)保护装置。 静电放电保护器件可以包括:半导体可控整流器; 和p-n二极管。 半导体可控整流器和二极管可以横向地集成在半导体衬底的主表面上; 并且用于半导体可控整流器的电流路径可以与用于二极管的电流路径分离。
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公开(公告)号:US09386642B2
公开(公告)日:2016-07-05
申请号:US14704768
申请日:2015-05-05
Applicant: NXP B.V.
IPC: H01L29/06 , H01L29/861 , H01L29/732 , H01L29/74 , H01L27/02 , H01L49/02 , H05B33/08 , H02M7/217 , H01L29/87
CPC classification number: H05B33/0815 , H01L27/0255 , H01L27/0259 , H01L27/0262 , H01L27/0288 , H01L28/20 , H01L29/0638 , H01L29/0684 , H01L29/732 , H01L29/74 , H01L29/861 , H01L29/87 , H02M7/217
Abstract: A semiconductor device (300a) comprising: a substrate (302) having a first surface (303); an n-type well (304) extending from the first surface (303) into the substrate (302) and configured to form a depletion region (306) in the substrate (302) around the n-type well (304); an insulating layer (340) extending over the first surface (303) of the substrate (302) from the n-type well (304), the insulating layer (340) configured to form an inversion layer (342) in the substrate (302) extending from the n-type well (304) adjacent to the first surface (303); wherein a p-type floating channel stopper (370a) is provided, configured to extend through the inversion layer (342) to reduce electrical coupling between the n-type well (304) and at least part of the inversion layer (342), and is electrically disconnected from a remainder of the substrate (320) outside of the depletion region (306).
Abstract translation: 一种半导体器件(300a),包括:具有第一表面(303)的衬底(302); 从所述第一表面(303)延伸到所述衬底(302)中并且被配置为在所述衬底(302)内围绕所述n型阱(304)形成耗尽区(306)的n型阱(304)。 绝缘层(340),其从所述n型阱(304)延伸到所述衬底(302)的所述第一表面(303)上方,所述绝缘层(340)被配置为在所述衬底(302)中形成反型层(342) )从邻近第一表面(303)的n型阱(304)延伸; 其特征在于,设置有p型浮动通道止动器(370a),其构造成延伸穿过所述反型层(342)以减小所述n型阱(304)与所述反型层(342)的至少一部分之间的电耦合,以及 与耗尽区(306)外部的衬底(320)的其余部分电连接。
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公开(公告)号:US20160104676A1
公开(公告)日:2016-04-14
申请号:US14849469
申请日:2015-09-09
Applicant: NXP B.V.
Inventor: Paul Huiskamp , Godfried Henricus Josephus Notermans
IPC: H01L23/522
Abstract: The present disclosure relates to a semiconductor device comprising a metallisation stack. The metallisation stack may include a first metallisation layer and a second metallisation layer. The first metallisation layer may be electrically connected to the second metallisation layer by a two or more stacked inter-metal vias.
Abstract translation: 本公开涉及包括金属化堆叠的半导体器件。 金属化堆叠可以包括第一金属化层和第二金属化层。 第一金属化层可以通过两个或更多个堆叠的金属间通孔电连接到第二金属化层。
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公开(公告)号:US09385115B2
公开(公告)日:2016-07-05
申请号:US14848003
申请日:2015-09-08
Applicant: NXP B.V.
CPC classification number: H01L27/0255 , H01L27/0262 , H01L27/067 , H01L29/0626 , H01L29/7416 , H01L29/7436 , H01L29/87
Abstract: The present disclosure relates to an electrostatic discharge (ESD) protection device. The electrostatic discharge protection device, may comprise: a semiconductor controlled rectifier; and a p-n diode. The semiconductor controlled rectifier and the diode may be integrally disposed laterally at a major surface of a semiconductor substrate; and a current path for the semiconductor controlled rectifier may be separate from a current path for the diode.
Abstract translation: 本公开涉及一种静电放电(ESD)保护装置。 静电放电保护器件可以包括:半导体可控整流器; 和p-n二极管。 半导体可控整流器和二极管可以横向地集成在半导体衬底的主表面上; 并且用于半导体可控整流器的电流路径可以与用于二极管的电流路径分离。
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公开(公告)号:US20150333119A1
公开(公告)日:2015-11-19
申请号:US14704768
申请日:2015-05-05
Applicant: NXP B.V.
IPC: H01L29/06 , H01L29/861 , H01L29/732 , H01L29/74 , H01L27/02 , H01L49/02
CPC classification number: H05B33/0815 , H01L27/0255 , H01L27/0259 , H01L27/0262 , H01L27/0288 , H01L28/20 , H01L29/0638 , H01L29/0684 , H01L29/732 , H01L29/74 , H01L29/861 , H01L29/87 , H02M7/217
Abstract: A semiconductor device (300a) comprising: a substrate (302) having a first surface (303); an n-type well (304) extending from the first surface (303) into the substrate (302) and configured to form a depletion region (306) in the substrate (302) around the n-type well (304); an insulating layer (340) extending over the first surface (303) of the substrate (302) from the n-type well (304), the insulating layer (340) configured to form an inversion layer (342) in the substrate (302) extending from the n-type well (304) adjacent to the first surface (303); wherein a p-type floating channel stopper (370a) is provided, configured to extend through the inversion layer (342) to reduce electrical coupling between the n-type well (304) and at least part of the inversion layer (342), and is electrically disconnected from a remainder of the substrate (320) outside of the depletion region (306).
Abstract translation: 一种半导体器件(300a),包括:具有第一表面(303)的衬底(302); 从所述第一表面(303)延伸到所述衬底(302)中并且被配置为在所述衬底(302)内围绕所述n型阱(304)形成耗尽区(306)的n型阱(304)。 绝缘层(340),其从所述n型阱(304)延伸到所述衬底(302)的所述第一表面(303)上方,所述绝缘层(340)被配置为在所述衬底(302)中形成反型层(342) )从邻近第一表面(303)的n型阱(304)延伸; 其特征在于,设置有p型浮动通道止动器(370a),其构造成延伸穿过所述反型层(342)以减小所述n型阱(304)与所述反型层(342)的至少一部分之间的电耦合,以及 与耗尽区(306)外部的衬底(320)的其余部分电连接。
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