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35 条记录 (耗时 0.046 秒)

    Semiconductor device
    1.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US09478621B2

    公开(公告)日：2016-10-25

    申请号：US14238915

    申请日：2012-09-04

    申请人： Nozomu Akagi ,  Yuma Kagata ,  Makoto Kuwahara

    发明人： Nozomu Akagi ,  Yuma Kagata ,  Makoto Kuwahara

    IPC分类号： H01L29/66 ,  H01L29/40 ,  H01L29/78 ,  H01L29/06 ,  H01L29/08

    CPC分类号： H01L29/405 ,  H01L29/0634 ,  H01L29/0878 ,  H01L29/404 ,  H01L29/7803 ,  H01L29/7808 ,  H01L29/7811 ,  H01L29/7813

    摘要： The element electrodes of a semiconductor element are disposed in a cell region, while an outermost peripheral electrode electrically connected to a semiconductor substrate is disposed in a peripheral region. In the peripheral region, a second-conductivity-type layer is disposed above a super-junction structure. A potential division region is disposed above the second-conductivity-type layer to electrically connect the element electrodes and the outermost peripheral electrode and also divide the voltage between the element electrodes and the outermost peripheral electrode into a plurality of stages. A part of the potential division region overlaps the peripheral region when viewed from the thickness direction of the semiconductor substrate.

    摘要翻译： 半导体元件的元件电极设置在单元区域中，而与半导体基板电连接的最外周电极设置在周边区域中。 在外围区域中，在超结结构上方设置第二导电型层。 电位分割区域设置在第二导电型层之上，以电连接元件电极和最外周电极，并且还将元件电极和最外周电极之间的电压分成多个级。 当从半导体衬底的厚度方向观察时，电势分割区域的一部分与周边区域重叠。

    SEMICONDUCTOR DEVICE
    2.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20140151785A1

    公开(公告)日：2014-06-05

    申请号：US14238915

    申请日：2012-09-04

    申请人： Nozomu Akagi ,  Yuma Kagata ,  Makoto Kuwahara

    发明人： Nozomu Akagi ,  Yuma Kagata ,  Makoto Kuwahara

    IPC分类号： H01L29/78

    CPC分类号： H01L29/405 ,  H01L29/0634 ,  H01L29/0878 ,  H01L29/404 ,  H01L29/7803 ,  H01L29/7808 ,  H01L29/7811 ,  H01L29/7813

    摘要： The element electrodes of a semiconductor element are disposed in a cell region, while an outermost peripheral electrode electrically connected to a semiconductor substrate is disposed in a peripheral region. In the peripheral region, a second-conductivity-type layer is disposed above a super-junction structure. A potential division region is disposed above the second-conductivity-type layer to electrically connect the element electrodes and the outermost peripheral electrode and also divide the voltage between the element electrodes and the outermost peripheral electrode into a plurality of stages. A part of the potential division region overlaps the peripheral region when viewed from the thickness direction of the semiconductor substrate.

    摘要翻译： 半导体元件的元件电极设置在单元区域中，而与半导体基板电连接的最外周电极设置在周边区域中。 在外围区域中，在超结结构上方设置第二导电型层。 电位分割区域设置在第二导电型层之上，以电连接元件电极和最外周电极，并且还将元件电极和最外周电极之间的电压分成多个级。 当从半导体衬底的厚度方向观察时，电势分割区域的一部分与周边区域重叠。

    Semiconductor device and manufacturing method of the same
    3.
    发明授权
    Semiconductor device and manufacturing method of the same 有权
    半导体器件及其制造方法相同

    公开(公告)号：US08384153B2

    公开(公告)日：2013-02-26

    申请号：US13177707

    申请日：2011-07-07

    申请人： Tsuyoshi Yamamoto ,  Masakiyo Sumitomo ,  Hitoshi Yamaguchi ,  Nozomu Akagi ,  Yuma Kagata

    发明人： Tsuyoshi Yamamoto ,  Masakiyo Sumitomo ,  Hitoshi Yamaguchi ,  Nozomu Akagi ,  Yuma Kagata

    IPC分类号： H01L21/336

    CPC分类号： H01L29/7813 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/66734 ,  H01L29/7811

    摘要： A semiconductor device includes: a substrate; multiple first and second conductive type regions on the substrate for providing a super junction structure; a channel layer on the super junction structure; a first conductive type layer in the channel layer; a contact second conductive type region in the channel layer; a gate electrode on the channel layer via a gate insulation film; a surface electrode on the channel layer; a backside electrode on the substrate opposite to the super junction structure; and an embedded second conductive type region. The embedded second conductive type region is disposed in a corresponding second conductive type region, protrudes into the channel layer, and contacts the contact second conductive type region. The embedded second conductive type region has an impurity concentration higher than the channel layer, and has a maximum impurity concentration at a position in the corresponding second conductive type region.

    摘要翻译： 半导体器件包括：衬底; 用于提供超结结构的衬底上的多个第一和第二导电类型区域; 超级结结构上的沟道层; 沟道层中的第一导电类型层; 沟道层中的接触第二导电类型区域; 通过栅极绝缘膜在沟道层上形成栅电极; 沟道层上的表面电极; 衬底上的与超结结构相反的背面电极; 和嵌入式第二导电类型区域。 嵌入的第二导电类型区域设置在相应的第二导电类型区域中，突出到沟道层中，并且与接触第二导电类型区域接触。 嵌入的第二导电类型区域的杂质浓度高于沟道层，并且在相应的第二导电类型区域的位置具有最大的杂质浓度。

    SEMICONDUCTOR DEVICE INCLUDING VERTICAL SEMICONDUCTOR ELEMENT
    4.
    发明申请
    SEMICONDUCTOR DEVICE INCLUDING VERTICAL SEMICONDUCTOR ELEMENT 审中-公开
    半导体器件包括垂直半导体元件

    公开(公告)号：US20140203356A1

    公开(公告)日：2014-07-24

    申请号：US14239291

    申请日：2012-08-30

    申请人： Yuma Kagata ,  Nozomu Akagi

    发明人： Yuma Kagata ,  Nozomu Akagi

    IPC分类号： H01L29/10 ,  H01L29/66 ,  H01L29/78

    CPC分类号： H01L29/1045 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/66734 ,  H01L29/7813

    摘要： A semiconductor device including a vertical semiconductor element has a trench gate structure and a dummy gate structure. The trench gate structure includes a first trench that penetrates a first impurity region and a base region to reach a first conductivity-type region in a super junction structure. The dummy gate structure includes a second trench that penetrates the base region reach the super junction structure and is formed to be deeper than the first trench.

    摘要翻译： 包括垂直半导体元件的半导体器件具有沟槽栅极结构和虚拟栅极结构。 沟槽栅极结构包括穿过第一杂质区域的第一沟槽和到达超结结构中的第一导电类型区域的基极区域。 虚拟栅极结构包括穿透基极区域到达超结结构并且形成为比第一沟槽更深的第二沟槽。