公开(公告)号：US20240007125A1

公开(公告)日：2024-01-04

申请号：US17810100

申请日：2022-06-30

Applicant: QUALCOMM Incorporated

Inventor： Haibo FEI ,  Xiahan ZHOU

IPC: H03M1/78 ,  H03M1/06

CPC classification number: H03M1/785 ,  H03M1/0607

Abstract: Methods and apparatus for common-mode current removal in a digital-to-analog converter (DAC). An example DAC circuit generally includes a plurality of current-steering cells, a resistor ladder circuit coupled to the plurality of current-steering cells, a first current sink coupled between a shunt branch of the resistor ladder circuit and a reference potential node for the DAC circuit, and a second current sink coupled between a first output of the DAC circuit and the reference potential node.

公开(公告)号：US20240421828A1

公开(公告)日：2024-12-19

申请号：US18335663

申请日：2023-06-15

Applicant: QUALCOMM Incorporated

Inventor： Haibo FEI ,  Xiahan ZHOU ,  Dongwon SEO ,  Parisa MAHMOUDIDARYAN

IPC: H03M1/78 ,  H03M1/10

Abstract: Certain aspects of the present disclosure provide a digital-to-analog converter (DAC) circuit. The DAC circuit generally includes: a decoder coupled to an input of the DAC circuit and current-steering cells coupled to an output of the decoder. Outputs of the current-steering cells may be coupled to a positive output node and a negative output node of the DAC circuit. The DAC circuit may also include an offset detection circuit including: a comparator having a first input and a second input selectively coupled to the positive output node and the negative output node; and a digital controller having an input coupled to an output of the comparator and an output coupled to the decoder. In some aspects, the DAC circuit includes one or more calibration DACs coupled to the offset detection circuit.

公开(公告)号：US20230403022A1

公开(公告)日：2023-12-14

申请号：US17806679

申请日：2022-06-13

Applicant: QUALCOMM Incorporated

Inventor： Xiahan ZHOU ,  Haibo FEI

IPC: H03M1/10 ,  H03M1/66

CPC classification number: H03M1/1042 ,  H03M1/66

Abstract: Methods and apparatus for controlling a power supply voltage for a switch driver in a digital-to-analog converter (DAC). An example DAC generally includes a plurality of DAC cells, each DAC cell comprising a current source, a first switch coupled in series with the current source at a first node, and a switch driver having an output coupled to a control input of the first switch; and calibration circuitry having a first input coupled to a first DAC cell in the plurality of DAC cells and having an output coupled to at least one of the plurality of DAC cells, the calibration circuitry being configured to sense a voltage of the first node in the first DAC cell and to control the power supply voltage for the switch driver in the at least one of the plurality of DAC cells, based on the sensed voltage of the first node.

公开(公告)号：US20240429937A1

公开(公告)日：2024-12-26

申请号：US18338708

申请日：2023-06-21

Applicant: QUALCOMM Incorporated

Inventor： Xiahan ZHOU ,  Haibo FEI ,  Nitz SAPUTRA ,  Andrew WEIL

IPC: H03M1/74

Abstract: Certain aspects of the present disclosure generally relate to a digital-to-analog converter (DAC) circuit implemented with a dynamic stacked transistor architecture. The DAC circuit generally includes a first current-steering transistor and a second current-steering transistor. The DAC circuit may also include: a first stacked transistor coupled between the first current-steering transistor and a first output of the DAC circuit; a first switch coupled between a gate of the first stacked transistor and a bias voltage node; a second switch coupled between the gate of the first stacked transistor and a voltage rail; a second stacked transistor coupled between the second current-steering transistor and a second output of the DAC circuit; a third switch coupled between a gate of the second stacked transistor and the bias voltage node; and a fourth switch coupled between the gate of the second stacked transistor and the voltage rail.

公开(公告)号：US20220416804A1

公开(公告)日：2022-12-29

申请号：US17359918

申请日：2021-06-28

Applicant: QUALCOMM Incorporated

Inventor： Shahin MEHDIZAD TALEIE ,  Dongwon SEO ,  Ashok SWAMINATHAN ,  Gurkanwal Singh SAHOTA ,  Andrew WEIL ,  Haibo FEI

IPC: H03M1/74 ,  H03M1/50 ,  H03M1/78 ,  H03M1/46

Abstract: Certain aspects of the present disclosure provide a digital-to-analog converter (DAC) system. The DAC system generally includes a plurality of current steering cells, each comprising a current source coupled to at least two current steering switches, wherein control inputs of the at least two current steering switches are coupled to an input path of the DAC system. The DAC system may also include a current source toggle circuit configured to selectively disable the current source of at least one of the plurality of current steering cells, and a feedforward path coupled between the input path and at least one control input of the current source toggle circuit.