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    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    1.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
    半导体器件及其制造方法

    公开(公告)号：US20170005189A1

    公开(公告)日：2017-01-05

    申请号：US15265328

    申请日：2016-09-14

    Applicant: Renesas Electronics Corporation

    Inventor： Yasuhiro OKAMOTO ,  Tatsuo NAKAYAMA ,  Takashi INOUE ,  Hironobu MIYAMOTO

    IPC: H01L29/778 ,  H01L29/205 ,  H01L21/02 ,  H01L29/417 ,  H01L29/66 ,  H01L29/20 ,  H01L29/423

    CPC classification number: H01L29/7787 ,  H01L21/02458 ,  H01L21/0254 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/41775 ,  H01L29/4236 ,  H01L29/66462 ,  H01L29/7786

    Abstract: A semiconductor device includes a first semiconductor layer, a second semiconductor layer formed over the first semiconductor layer, a third semiconductor layer formed over the second semiconductor layer, a gate electrode formed over the third semiconductor layer, and a gate insulating film formed between the third semiconductor layer and the gate electrode. The second semiconductor layer includes an Alyα1-yN layer (α includes Ga or In, and 0≦y y” at an interface between the second nitride semiconductor layer and the third nitride semiconductor layer.

    Abstract translation: 半导体器件包括第一半导体层，形成在第一半导体层上的第二半导体层，形成在第二半导体层上的第三半导体层，形成在第三半导体层上的栅电极和形成在第三半导体层之间的栅极绝缘膜 半导体层和栅电极。 第二半导体层包括Alyα1-yN层（α包括Ga或In，并且0≤y<1），第三半导体层包括Alzα1-zN层（0≤z<1）。 形成第二半导体层的Alyα1-yN层的y至少在栅极下方的区域从第三半导体层增加到第一半导体层。 在第二氮化物半导体层和第三氮化物半导体层之间的界面处存在关系“z> y”。

    SEMICONDUCTOR DEVICE
    3.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20150221758A1

    公开(公告)日：2015-08-06

    申请号：US14590433

    申请日：2015-01-06

    Applicant: Renesas Electronics Corporation

    Inventor： Yoshinao MIURA ,  Tatsuo NAKAYAMA ,  Takashi INOUE ,  Hironobu MIYAMOTO

    IPC: H01L29/778 ,  H01L29/423 ,  H01L29/205 ,  H01L29/20 ,  H01L29/201

    CPC classification number: H01L29/7787 ,  H01L29/1087 ,  H01L29/2003 ,  H01L29/201 ,  H01L29/205 ,  H01L29/4175 ,  H01L29/41758 ,  H01L29/4236 ,  H01L29/66462 ,  H01L29/7783

    Abstract: To provide a semiconductor device having improved characteristics. The semiconductor device has, over a substrate thereof, a first buffer layer (GaN), a second buffer layer (AlGaN), a channel layer, and a barrier layer, a trench penetrating through the barrier layer and reaching the middle of the channel layer, a gate electrode placed in the trench via a gate insulating film, and a source electrode and a drain electrode formed on both sides of the gate electrode respectively. By a coupling portion in a through-hole reaching the first buffer layer, the buffer layer and the source electrode are electrically coupled to each other. Due to a two-dimensional electron gas produced in the vicinity of the interface between these two buffer layers, the semiconductor device can have an increased threshold voltage and improved normally-off characteristics.

    Abstract translation: 提供具有改进特性的半导体器件。 半导体器件在其衬底上具有第一缓冲层（GaN），第二缓冲层（AlGaN），沟道层和势垒层，穿过阻挡层并到达沟道层中间的沟槽 通过栅极绝缘膜放置在沟槽中的栅电极，以及分别形成在栅极两侧的源电极和漏电极。 通过到达第一缓冲层的通孔中的耦合部分，缓冲层和源电极彼此电耦合。 由于在这两个缓冲层之间的界面附近产生的二维电子气，所以半导体器件可以具有增加的阈值电压和改善的常关特性。

    SEMICONDUCTOR DEVICE
    4.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20140015019A1

    公开(公告)日：2014-01-16

    申请号：US13937846

    申请日：2013-07-09

    Applicant: Renesas Electronics Corporation

    Inventor： Yasuhiro OKAMOTO ,  Takashi INOUE ,  Tatsuo NAKAYAMA ,  Ryohei NEGA ,  Masaaki KANAZAWA ,  Hironobu MIYAMOTO

    IPC: H01L29/78

    CPC classification number: H01L29/452 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66462 ,  H01L29/7787 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: The reliability of a field effect transistor made of a nitride semiconductor material is improved. An ohmic electrode includes a plurality of unit electrodes isolated to be separated from each other. With this configuration, an on-state current can be prevented from flowing in the unit electrodes in a y-axial direction (negative direction). Further, in the respective unit electrodes, a current density of the on-state current flowing in the y-axial direction (negative direction) can be prevented from increasing. As a result, an electromigration resistance of the ohmic electrode can be improved.

    Abstract translation: 提高了由氮化物半导体材料制成的场效应晶体管的可靠性。 欧姆电极包括被隔离以彼此分离的多个单元电极。 由此，能够防止在y轴方向（负方向）在单位电极中流通导通电流。 此外，在各单元电极中，可以防止沿y轴方向（负方向）流动的通态电流的电流密度增加。 结果，可以提高欧姆电极的电迁移电阻。

    SEMICONDUCTOR DEVICE
    5.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20160079409A1

    公开(公告)日：2016-03-17

    申请号：US14947172

    申请日：2015-11-20

    Applicant: Renesas Electronics Corporation

    Inventor： Yasuhiro OKAMOTO ,  Yuji ANDO ,  Tatsuo NAKAYAMA ,  Takashi INOUE ,  Kazuki OTA

    IPC: H01L29/778 ,  H01L29/205 ,  H01L29/423 ,  H01L29/20

    CPC classification number: H01L29/7787 ,  H01L29/2003 ,  H01L29/201 ,  H01L29/205 ,  H01L29/4236 ,  H01L29/517 ,  H01L29/66462 ,  H01L29/7783 ,  H01L29/7786

    Abstract: A semiconductor device including a field effect transistor including a substrate, a lower barrier layer provided on the substrate, a channel layer provided on the lower barrier layer, an electron supplying layer provided on the channel layer, a source electrode and a drain electrode provided on the electron layer, and a gate electrode provided between the source electrode and the drain electrode. The lower barrier layer includes a composition of In1-zAlzN (0≦z≦1). The channel layer includes a composition of AlxGa1-xN (0≦x≦1). A recess is provided in a region between the source electrode and the drain electrode, wherein the recess goes through the electron supplying layer to a depth that exposes the channel layer, and the gate electrode is disposed on a gate insulating film that covers a bottom surface and an inner wall surface of the recess.

    Abstract translation: 一种包括场效应晶体管的半导体器件，包括衬底，设置在衬底上的下阻挡层，设置在下阻挡层上的沟道层，设置在沟道层上的电子供给层，设置在沟道层上的源电极和漏电极 电子层和设置在源电极和漏电极之间的栅电极。 下阻挡层包括In1-zAlzN（0＆nlE; z＆nlE; 1）的组合物。 沟道层包括Al x Ga 1-x N（0＆amp; nlE; x＆nlE; 1）的组成。 在源电极和漏电极之间的区域设置有凹部，其中，凹部穿过电子供给层到达暴露沟道层的深度，并且栅电极设置在覆盖底面的栅极绝缘膜上 和凹部的内壁表面。

    SEMICONDUCTOR DEVICE
    8.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20150076511A1

    公开(公告)日：2015-03-19

    申请号：US14550118

    申请日：2014-11-21

    Applicant: Renesas Electronics Corporation

    Inventor： Yasuhiro OKAMOTO ,  Yuji ANDO ,  Tatsuo NAKAYAMA ,  Takashi INOUE ,  Kazuki OTA

    IPC: H01L29/778 ,  H01L29/423 ,  H01L29/205 ,  H01L29/20 ,  H01L29/201

    CPC classification number: H01L29/7787 ,  H01L29/2003 ,  H01L29/201 ,  H01L29/205 ,  H01L29/4236 ,  H01L29/517 ,  H01L29/66462 ,  H01L29/7783 ,  H01L29/7786

    Abstract: A field effect transistor includes a substrate and a semiconductor layer provided on the substrate, wherein the semiconductor layer includes a lower barrier layer provided on the substrate, Ga-face grown, lattice relaxed, and having a composition In1−zAlzN (0≦z≦1), a channel layer having a composition of: AlxGa1−xN (0≦x≦1) or InyGa1−yN (0≦y≦1). Or GaN provided on and lattice-matched to the lower barrier layer, a source electrode and a drain electrode having ohmic contact to an upper part of the semiconductor layers, disposed spaced to each other, and a gate electrode arranged via a gate insulating film in a region lying between the source electrode and the drain electrode.

    Abstract translation: 场效应晶体管包括衬底和设置在衬底上的半导体层，其中半导体层包括设置在衬底上的下阻挡层，生长Ga面，晶格弛豫并具有组成In 1-z Al z N（0＆nl; z＆nl E; 1），具有以下组成的沟道层：Al x Ga 1-x N（0＆amp; nlE; x＆nlE; 1）或In y Ga 1-y N（0＆nlE; y＆nlE; 1）。 或提供在栅极绝缘膜上并与栅极绝缘膜配置的栅电极，栅极配置在栅极绝缘膜上，栅电极配置在栅极绝缘膜上， 位于源电极和漏电极之间的区域。

    SEMICONDUCTOR DEVICE
    9.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20140264274A1

    公开(公告)日：2014-09-18

    申请号：US14198430

    申请日：2014-03-05

    Applicant: Renesas Electronics Corporation

    Inventor： Tatsuo NAKAYAMA ,  Hironobu MIYAMOTO ,  Yasuhiro OKAMOTO ,  Ryohei NEGA ,  Masaaki KANAZAWA ,  Takashi INOUE

    IPC: H01L29/778

    CPC classification number: H01L29/66462 ,  H01L29/155 ,  H01L29/2003 ,  H01L29/7787

    Abstract: To improve performance of a semiconductor device. For example, on the assumption that a superlattice layer is inserted between a buffer layer and a channel layer, a concentration of acceptors introduced into nitride semiconductor layers forming a part of the superlattice layer is higher than a concentration of acceptors introduced into nitride semiconductor layers forming the other part of the superlattice layer. That is, the concentration of acceptors introduced into the nitride semiconductor layers having a small band gap is higher than the concentration of acceptors introduced into the nitride semiconductor layers having a large band gap.

    Abstract translation: 提高半导体器件的性能。 例如，假设超晶格层被插入在缓冲层和沟道层之间，则导入形成超晶格层的一部分的氮化物半导体层中的受主的浓度高于形成氮化物半导体层的受主的浓度 超晶格层的另一部分。 也就是说，导入具有小带隙的氮化物半导体层的受主的浓度高于导入具有大带隙的氮化物半导体层的受主的浓度。

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    10.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20140209980A1

    公开(公告)日：2014-07-31

    申请号：US14229645

    申请日：2014-03-28

    Applicant: Renesas Electronics Corporation

    Inventor： Takashi INOUE ,  Tatsuo NAKAYAMA ,  Yasuhiro OKAMOTO ,  Hironobu MIYAMOTO

    IPC: H01L29/778 ,  H01L29/66

    CPC classification number: H01L29/778 ,  H01L21/02458 ,  H01L21/0254 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/4236 ,  H01L29/432 ,  H01L29/517 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/7783

    Abstract: A method for manufacturing a semiconductor device includes forming a buffer layer made of a nitride semiconductor, forming a channel layer made of a nitride semiconductor over the buffer layer, forming a barrier layer made of a nitride semiconductor over the channel layer, forming a cap layer made of a nitride semiconductor over the barrier layer, forming a gate insulating film so as to in contact with the cap layer; and forming a gate electrode over the gate insulating film, wherein compression strains are generated at an interface between the cap layer and the barrier layer and an interface between the channel layer and the buffer layer and a tensile strain is generated at an interface between the barrier layer and the channel layer by controlling compositions of the cap layer, the barrier layer, the channel layer, and the buffer layer.

    Abstract translation: 一种半导体器件的制造方法，包括：形成由氮化物半导体构成的缓冲层，在所述缓冲层上形成由氮化物半导体构成的沟道层，在所述沟道层上形成由氮化物半导体构成的阻挡层，形成覆盖层 由阻挡层上的氮化物半导体形成，形成栅极绝缘膜以与盖层接触; 以及在所述栅极绝缘膜上形成栅电极，其中在所述覆盖层和所述阻挡层之间的界面处产生压缩应变，以及在所述沟道层和所述缓冲层之间的界面处产生压应变，并且在所述栅极之间的界面处产生拉伸应变 层和沟道层，通过控制盖层，阻挡层，沟道层和缓冲层的组成。

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