公开(公告)号：US20250140630A1

公开(公告)日：2025-05-01

申请号：US19009941

申请日：2025-01-04

Applicant: Richtek Technology Corporation

Inventor： Hao-Lin Yen ,  Heng-Chi Huang ,  Yong-Zhong Hu

IPC: H01L23/34 ,  H01L21/56 ,  H01L23/31

Abstract: A chip package unit includes: a base material; at least one chip, disposed on the base material; a package material, enclosing the base material and the chip; and at least one heat dissipation paste curing layer, formed by curing the heat dissipation paste, on a top side of the package material or a back side of the chip in a printed pattern.

公开(公告)号：US20240203840A1

公开(公告)日：2024-06-20

申请号：US18520789

申请日：2023-11-28

Applicant: Richtek Technology Corporation

Inventor： Shih-Chieh Lin ,  Min-Shun Lo ,  Heng-Chi Huang ,  Yong-Zhong Hu

IPC: H01L23/495

CPC classification number: H01L23/49544

Abstract: A lead frame includes: a die pad having a die disposing area; a plurality of lead pads located around the die pad; an outer frame, located at a periphery of the die pad and the lead pads; and at least two tie bars, respectively connected between the outer frame and two opposite sides of the die pad. At least one of the die pad and the tie bars includes a thermal deformation mitigation structure.

公开(公告)号：US11973010B2

公开(公告)日：2024-04-30

申请号：US17490038

申请日：2021-09-30

Applicant: Richtek Technology Corporation

Inventor： Hao-Lin Yen ,  Heng-Chi Huang ,  Yong-Zhong Hu

IPC: H01L21/78 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/495

CPC classification number: H01L23/49568 ,  H01L21/4825 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/49503 ,  H01L23/4952

Abstract: A chip packaging method includes: providing a wafer, on which multiple bumps are formed; cutting the wafer into multiple chip units, wherein multiple vertical heat conduction elements are formed on the wafer or the chip units; disposing the chip units on a base material; and providing a package material to encapsulate lateral sides and a bottom surface of each of the chip units, to form a chip package unit, wherein the bottom surface of the chip unit faces the base material; wherein, in the chip package unit, the bumps on the chip units abut against the base material, and wherein the vertical heat conduction elements directly connect to the base material, or the base material includes multiple through-holes and the vertical heat conduction elements pass through the multiple through-holes in the base material.

公开(公告)号：US20220367309A1

公开(公告)日：2022-11-17

申请号：US17718125

申请日：2022-04-11

Applicant: Richtek Technology Corporation

Inventor： Hao-Lin Yen ,  Heng-Chi Huang ,  Yong-Zhong Hu

IPC: H01L23/34 ,  H01L23/31 ,  H01L21/56

Abstract: A chip package unit includes: a base material; at least one chip, disposed on the base material; a package material, enclosing the base material and the chip; and at least one heat dissipation paste curing layer, formed by curing the heat dissipation paste, on a top side of the package material or a back side of the chip in a printed pattern.

公开(公告)号：US11469162B2

公开(公告)日：2022-10-11

申请号：US17356810

申请日：2021-06-24

Applicant: Richtek Technology Corporation

Inventor： Hao-Lin Yen ,  Heng-Chi Huang ,  Yong-Zhong Hu

IPC: H01L23/495 ,  H01L23/34 ,  H01L23/28 ,  H01L21/00 ,  H05K7/20 ,  H01L23/31 ,  H01L25/07 ,  H01L23/14 ,  H01L25/075 ,  H01L23/00 ,  H01L23/40

Abstract: The present invention provides a chip packaging method, which includes: providing a base material, which includes plural finger contacts; disposing plural chips on the base material by flip chip mounting technology, and disposing plural vertical heat conducting elements surrounding each of the chips to connect the finger contacts on the base material; providing a packaging material to encapsulate the base material, the chips, and the vertical heat conducting elements; adhering a metal film on the packaging material via an adhesive layer, to form a package structure; and cutting the package structure into plural chip package units, wherein each of the chip package units includes one of the chips, a portion of the base material, a portion of the metal film, and a portion of the vertical heat conducting elements surrounding the chip.

公开(公告)号：US20230163042A1

公开(公告)日：2023-05-25

申请号：US17858124

申请日：2022-07-06

Applicant: Richtek Technology Corporation

Inventor： Heng-Chi Huang ,  Sheng-Yao Wu ,  Min-Shun Lo ,  Shih-Chieh Lin ,  Yong-Zhong Hu

IPC: H01L23/367 ,  H01L25/065 ,  H01L23/00 ,  H01L21/56 ,  H01L21/48 ,  H01L23/31 ,  H01L23/373

CPC classification number: H01L23/3675 ,  H01L25/0655 ,  H01L24/16 ,  H01L24/96 ,  H01L24/97 ,  H01L21/568 ,  H01L21/561 ,  H01L24/11 ,  H01L21/4882 ,  H01L23/3121 ,  H01L23/3735 ,  H01L2924/30101 ,  H01L2924/30107 ,  H01L2224/95001 ,  H01L24/13 ,  H01L2224/13147 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13116 ,  H01L2224/11462 ,  H01L2224/1184 ,  H01L2224/11849 ,  H01L2224/16235 ,  H01L2924/182

Abstract: A package structure includes: a heat dissipation substrate; at least one die, including a signal transmitting side and a heat conduction side, wherein the signal transmitting side and the heat conduction side are two opposite sides on the die, and the heat conduction side is disposed on and in contact with the heat dissipation substrate; plural metal bumps, disposed on the signal transmitting side; and a package material, encapsulating the die, a side of the heat dissipation substrate in contact with the die, and the metal bumps, wherein a portion of each metal bump is exposed to an outside of the package material.

公开(公告)号：US20230131821A1

公开(公告)日：2023-04-27

申请号：US17858117

申请日：2022-07-06

Applicant: Richtek Technology Corporation

Inventor： Heng-Chi Huang ,  Sheng-Yao Wu ,  Chi-Yung Wu ,  Yong-Zhong Hu

IPC: H01L23/495

Abstract: A heat dissipation structure, includes: a lead frame, including a high temperature pad and a low temperature pad, the high temperature pad and the low temperature pad being two portions in the lead frame which are separated from each other, wherein a high heat generation component is disposed on the high temperature pad; and a high thermal conduction element, including two sides which are respectively directly connected with the high temperature pad and the low temperature pad, to dissipate the heat energy from the high heat generation component to the low temperature pad.

公开(公告)号：US20220157622A1

公开(公告)日：2022-05-19

申请号：US17485339

申请日：2021-09-25

Applicant: Richtek Technology Corporation

Inventor： Heng-Chi Huang ,  Yong-Zhong Hu ,  Hao-Lin Yen

IPC: H01L21/48 ,  H01L21/683 ,  H01L21/78 ,  H01L23/373

Abstract: A chip packaging method includes: providing plural chip units; providing a base material, and placing the chip units on the base material; providing an adhesive layer to adhere a metal foil to the chip unit, wherein the metal foil is a part of the base material or additional to the base material; and cutting the chip units on the base material to form plural separated chip package units, wherein each of the chip package units includes a cut metal foil part.

公开(公告)号：US20240234264A1

公开(公告)日：2024-07-11

申请号：US18616275

申请日：2024-03-26

Applicant: Richtek Technology Corporation

Inventor： Hao-Lin Yen ,  Heng-Chi Huang ,  Yong-Zhong Hu

IPC: H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78 ,  H01L23/31

CPC classification number: H01L23/49568 ,  H01L21/4825 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/49503 ,  H01L23/4952

Abstract: A chip packaging method includes: providing a wafer, on which multiple bumps are formed; cutting the wafer into multiple chip units, wherein multiple vertical heat conduction elements are formed on the wafer or the chip units; disposing the chip units on a base material; and providing a package material to encapsulate lateral sides and a bottom surface of each of the chip units, to form a chip package unit, wherein the bottom surface of the chip unit faces the base material; wherein, in the chip package unit, the bumps on the chip units abut against the base material, and wherein the vertical heat conduction elements directly connect to the base material, or the base material includes multiple through-holes and the vertical heat conduction elements pass through the multiple through-holes in the base material.

公开(公告)号：US20230098393A1

公开(公告)日：2023-03-30

申请号：US17847231

申请日：2022-06-23

Applicant: Richtek Technology Corporation

Inventor： Hao-Lin Yen ,  Heng-Chi Huang ,  Yong-Zhong Hu

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

Abstract: A lead frame includes: at least one ductile structure, including a bond area, a die paddle, or a lead finger; and at least one sacrificial structure, connected between a corresponding ductile structure and a corresponding near portion in the lead frame, wherein the near portion is a portion of the lead frame close to the ductile structure.