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    Phase change memory cell and manufacturing method thereof using minitrenches
    2.
    发明授权
    Phase change memory cell and manufacturing method thereof using minitrenches 有权
    相变存储单元及其制造方法

    公开(公告)号：US06891747B2

    公开(公告)日：2005-05-10

    申请号：US10372761

    申请日：2003-02-20

    申请人： Roberto Bez ,  Fabio Pellizzer ,  Marina Tosi ,  Romina Zonca

    发明人： Roberto Bez ,  Fabio Pellizzer ,  Marina Tosi ,  Romina Zonca

    IPC分类号： G11C11/56 ,  H01L27/24 ,  H01L45/00 ,  G11C11/00

    CPC分类号： H01L45/06 ,  G11C11/5678 ,  G11C13/0004 ,  H01L27/2445 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144 ,  H01L45/1691

    摘要： The phase change memory cell is formed by a resistive element and by a memory region of a phase change material. The resistive element has a first thin portion having a first sublithographic dimension in a first direction; and the memory region has a second thin portion having a second sublithographic dimension in a second direction transverse to the first dimension. The first thin portion and the second thin portion are in direct electrical contact and define a contact area of sublithographic extension. The second thin portion is delimited laterally by oxide spacer portions surrounded by a mold layer which defines a lithographic opening. The spacer portions are formed after forming the lithographic opening, by a spacer formation technique.

    摘要翻译： 相变存储单元由电阻元件和相变材料的存储区形成。 电阻元件具有在第一方向上具有第一亚光刻尺寸的第一薄部分; 并且所述存储区域具有第二薄部分，所述第二薄部分具有横向于所述第一尺寸的第二方向的第二亚光刻尺寸。 第一薄部分和第二薄部分直接电接触并限定亚光刻延伸部分的接触面积。 第二薄部分被由限定光刻开口的模具层围绕的氧化物间隔部分侧向限定。 通过间隔物形成技术在形成光刻开口之后形成间隔部分。

    PHASE CHANGE MEMORY CELL AND MANUFACTURING METHOD THEREOF USING MINITRENCHES
    3.
    发明申请
    PHASE CHANGE MEMORY CELL AND MANUFACTURING METHOD THEREOF USING MINITRENCHES 有权
    相变存储器单元及其使用MINITRENCHES的制造方法

    公开(公告)号：US20110237045A1

    公开(公告)日：2011-09-29

    申请号：US13158291

    申请日：2011-06-10

    申请人： Roberto Bez ,  Fabio Pellizzer ,  Marina Tosi ,  Romina Zonca

    发明人： Roberto Bez ,  Fabio Pellizzer ,  Marina Tosi ,  Romina Zonca

    IPC分类号： H01L21/20

    CPC分类号： H01L45/06 ,  G11C11/5678 ,  G11C13/0004 ,  H01L27/2445 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144 ,  H01L45/1691

    摘要： A process forms a phase change memory cell using a resistive element and a memory region of a phase change material. The resistive element has a first thin portion having a first sublithographic dimension in a first direction; and the memory region has a second thin portion having a second sublithographic dimension in a second direction transverse to the first dimension. The first thin portion and the second thin portion are in direct electrical contact and define a contact area of sublithographic extension. The second thin portion is delimited laterally by oxide spacer portions surrounded by a mold layer which defines a lithographic opening. The spacer portions are formed after forming the lithographic opening, by a spacer formation technique.

    摘要翻译： 一种方法使用电阻元件和相变材料的存储区形成相变存储单元。 电阻元件具有在第一方向上具有第一亚光刻尺寸的第一薄部分; 并且所述存储区域具有第二薄部分，所述第二薄部分具有横向于所述第一尺寸的第二方向的第二亚光刻尺寸。 第一薄部分和第二薄部分直接电接触并限定亚光刻延伸部分的接触面积。 第二薄部分被由限定光刻开口的模具层围绕的氧化物间隔部分侧向限定。 通过间隔物形成技术在形成光刻开口之后形成间隔部分。

    Phase change memory cell and manufacturing method thereof using minitrenches
    4.
    发明授权
    Phase change memory cell and manufacturing method thereof using minitrenches 有权
    相变存储单元及其制造方法

    公开(公告)号：US07993957B2

    公开(公告)日：2011-08-09

    申请号：US11045170

    申请日：2005-01-27

    申请人： Roberto Bez ,  Fabio Pellizzer ,  Marina Tosi ,  Romina Zonca

    发明人： Roberto Bez ,  Fabio Pellizzer ,  Marina Tosi ,  Romina Zonca

    IPC分类号： H01L21/00

    CPC分类号： H01L45/06 ,  G11C11/5678 ,  G11C13/0004 ,  H01L27/2445 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144 ,  H01L45/1691

    摘要： A process forms a phase change memory cell using a resistive element and a memory region of a phase change material. The resistive element has a first thin portion having a first sublithographic dimension in a first direction; and the memory region has a second thin portion having a second sublithographic dimension in a second direction transverse to the first dimension. The first thin portion and the second thin portion are in direct electrical contact and define a contact area of sublithographic extension. The second thin portion is delimited laterally by oxide spacer portions surrounded by a mold layer which defines a lithographic opening. The spacer portions are formed after forming the lithographic opening, by a spacer formation technique.

    摘要翻译： 一种方法使用电阻元件和相变材料的存储区形成相变存储单元。 电阻元件具有在第一方向上具有第一亚光刻尺寸的第一薄部分; 并且所述存储区域具有第二薄部分，所述第二薄部分具有横向于所述第一尺寸的第二方向的第二亚光刻尺寸。 第一薄部分和第二薄部分直接电接触并限定亚光刻延伸部分的接触面积。 第二薄部分被由限定光刻开口的模具层围绕的氧化物间隔部分侧向限定。 通过间隔物形成技术在形成光刻开口之后形成间隔部分。

    Phase change memory cell and manufacturing method thereof using minitrenches
    5.
    发明申请
    Phase change memory cell and manufacturing method thereof using minitrenches 有权
    相变存储单元及其制造方法

    公开(公告)号：US20050152208A1

    公开(公告)日：2005-07-14

    申请号：US11045170

    申请日：2005-01-27

    申请人： Roberto Bez ,  Fabio Pellizzer ,  Marina Tosi ,  Romina Zonca

    发明人： Roberto Bez ,  Fabio Pellizzer ,  Marina Tosi ,  Romina Zonca

    IPC分类号： G11C11/56 ,  H01L27/24 ,  H01L45/00 ,  G01R31/08

    CPC分类号： H01L45/06 ,  G11C11/5678 ,  G11C13/0004 ,  H01L27/2445 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144 ,  H01L45/1691

    摘要： A process forms a phase change memory cell using a resistive element and a memory region of a phase change material. The resistive element has a first thin portion having a first sublithographic dimension in a first direction; and the memory region has a second thin portion having a second sublithographic dimension in a second direction transverse to the first dimension. The first thin portion and the second thin portion are in direct electrical contact and define a contact area of sublithographic extension. The second thin portion is delimited laterally by oxide spacer portions surrounded by a mold layer which defines a lithographic opening. The spacer portions are formed after forming the lithographic opening, by a spacer formation technique.

    摘要翻译： 一种方法使用电阻元件和相变材料的存储区形成相变存储单元。 电阻元件具有在第一方向上具有第一亚光刻尺寸的第一薄部分; 并且所述存储区域具有第二薄部分，所述第二薄部分具有横向于所述第一尺寸的第二方向的第二亚光刻尺寸。 第一薄部分和第二薄部分直接电接触并限定亚光刻延伸部分的接触面积。 第二薄部分被由限定光刻开口的模具层围绕的氧化物间隔部分侧向限定。 通过间隔物形成技术在形成光刻开口之后形成间隔部分。

    Process for manufacturing a memory device, in particular a phase change memory, including a silicidation step
    6.
    发明授权
    Process for manufacturing a memory device, in particular a phase change memory, including a silicidation step 有权
    用于制造存储器件的方法，特别是包括硅化步骤的相变存储器

    公开(公告)号：US06974734B2

    公开(公告)日：2005-12-13

    申请号：US10758289

    申请日：2004-01-15

    申请人： Fabio Pellizzer ,  Roberto Bez ,  Marina Tosi

    发明人： Fabio Pellizzer ,  Roberto Bez ,  Marina Tosi

    IPC分类号： H01L21/8238 ,  H01L27/24 ,  H01L21/338 ,  H01L29/94

    CPC分类号： H01L21/823835 ,  H01L27/2445 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144

    摘要： A process wherein an insulating region is formed in a body at least around an array portion of a semiconductor body; a gate electrode of semiconductor material is formed on top of a circuitry portion of the semiconductor body; a first silicide protection mask is formed on top of the array portion; the gate electrode and the active areas of the circuitry portion are silicided and the first silicide protection mask is removed. The first silicide protection mask (is of polysilicon and is formed simultaneously with the gate electrode. A second silicide protection mask of dielectric material covering the first silicide protection mask is formed before silicidation of the gate electrode. The second silicide protection mask is formed simultaneously with spacers formed laterally to the gate electrode.

    摘要翻译： 一种绝缘区域至少在半导体本体的阵列部分周围形成在主体中的工艺; 半导体材料的栅电极形成在半导体本体的电路部分的顶部; 在阵列部分的顶部形成第一硅化物保护掩模; 栅电极和电路部分的有源区被硅化，并且去除第一硅化物保护掩模。 第一硅化物保护掩模（多晶硅，并与栅电极同时形成）在栅极电极硅化之前形成覆盖第一硅化物保护掩模的第二硅化物保护掩模，第二硅化物保护掩膜与 间隔件横向形成到栅电极。