公开(公告)号：US09177793B2

公开(公告)日：2015-11-03

申请号：US13953917

申请日：2013-07-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyongsoo Kim ,  Joon Kim ,  WonSeok Yoo

IPC: H01L21/00 ,  H01L21/027 ,  H01L21/033 ,  H01L21/311 ,  H01L23/544 ,  G03F9/00

CPC classification number: H01L21/027 ,  G03F9/708 ,  H01L21/0274 ,  H01L21/0337 ,  H01L21/31144 ,  H01L23/544 ,  H01L2223/54426 ,  H01L2223/5446 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of fabricating a semiconductor device includes forming an etch-target layer on a substrate having an alignment key, forming a transparent first pattern on the etch-target layer to face the alignment key, forming an opaque second pattern on the etch-target layer to be adjacent to the first pattern, and etching the etch-target layer using the first pattern and the second pattern as an etch mask.

Abstract translation: 制造半导体器件的方法包括在具有对准键的衬底上形成蚀刻目标层，在蚀刻目标层上形成透明的第一图案以面对对准键，在蚀刻靶层上形成不透明的第二图案 与第一图案相邻，并且使用第一图案和第二图案作为蚀刻掩模蚀刻蚀刻目标层。

公开(公告)号：US09842841B2

公开(公告)日：2017-12-12

申请号：US14849651

申请日：2015-09-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ji Hun Kim ,  Ilgweon Kim ,  Junhwa Song ,  Jeonghoon Oh ,  WonSeok Yoo ,  Eun-Sun Lee

IPC: H01L21/8242 ,  H01L21/762 ,  H01L21/311 ,  H01L27/108 ,  H01L21/8234 ,  H01L21/8238 ,  H01L49/02

CPC classification number: H01L27/10894 ,  H01L21/76224 ,  H01L21/823412 ,  H01L21/823807 ,  H01L27/10805 ,  H01L27/10814 ,  H01L27/10817 ,  H01L27/1085 ,  H01L27/10855 ,  H01L27/10873 ,  H01L27/10891 ,  H01L28/91

Abstract: A method of fabricating a semiconductor device, the method including etching a portion of a substrate including a first region and a second region to form a device isolation trench; forming a device isolation layer defining active regions by sequentially stacking a first insulating layer, a second insulating layer, and a third insulating layer on an inner surface of the device isolation trench; forming word lines buried in the substrate of the first region, the word lines extending in a first direction to intersect the active region of the first region, the word lines being spaced apart from each other; forming a first mask layer covering the word lines on the substrate of the first region, the first mask layer exposing the substrate of the second region; forming a channel layer on the substrate of the second region; and forming a gate electrode on the channel layer.