Integrated circuit devices with capacitor and methods of manufacturing the same
    1.
    发明授权
    Integrated circuit devices with capacitor and methods of manufacturing the same 有权
    具有电容器的集成电路器件及其制造方法

    公开(公告)号:US09111953B2

    公开(公告)日:2015-08-18

    申请号:US13790773

    申请日:2013-03-08

    IPC分类号: H01L49/02 H01L27/108

    摘要: An integrated circuit device with capacitors and methods of forming the integrated circuit device are provided. The methods may include forming a first lower capacitor electrode pattern on an inner surface of a hole in a mold layer. The first lower capacitor electrode pattern may have a hollow cylindrical shape and an opening in an upper surface. The method may further include forming a second lower capacitor electrode pattern plugging the opening and an upper surface of the second lower capacitor electrode pattern may be planar. The first and the second lower capacitor electrode patterns may comprise a lower capacitor electrode including a void. Additionally, the method may include removing the mold layer to expose the lower capacitor electrode, forming a dielectric layer on the lower capacitor electrode, and forming an upper capacitor electrode layer on the dielectric layer.

    摘要翻译: 提供具有电容器的集成电路器件和形成集成电路器件的方法。 所述方法可以包括在模具层中的孔的内表面上形成第一低电容电极图案。 第一较低电容器电极图案可以具有中空圆柱形形状和在上表面中的开口。 该方法还可以包括形成插入开口的第二下电容器电极图案,并且第二下电容器电极图案的上表面可以是平面的。 第一和第二下部电容器电极图案可以包括包括空隙的下部电容器电极。 此外,该方法可以包括去除模具层以暴露下电容器电极,在下电容器电极上形成介电层,并在电介质层上形成上电容器电极层。

    Capacitor of semiconductor device and method of fabricating the same
    2.
    发明授权
    Capacitor of semiconductor device and method of fabricating the same 有权
    半导体器件的电容器及其制造方法

    公开(公告)号:US09159729B2

    公开(公告)日:2015-10-13

    申请号:US14028976

    申请日:2013-09-17

    IPC分类号: H01L27/108 H01L49/02

    摘要: Capacitor of a semiconductor device, and a method of fabricating the same, include sequentially forming a mold structure and a polysilicon pattern over a semiconductor substrate, patterning the mold structure using the polysilicon pattern as an etch mask to form lower electrode holes penetrating the mold structure, forming a protection layer covering a surface of the polysilicon pattern, forming lower electrodes in the lower electrode holes provided with the protection layer, removing the polysilicon pattern and the protection layer to expose upper sidewalls of the lower electrodes, removing the mold structure to expose lower sidewalls of the lower electrodes, and sequentially forming a dielectric and an upper electrode covering the lower electrodes.

    摘要翻译: 半导体器件的电容器及其制造方法包括在半导体衬底上顺序地形成模具结构和多晶硅图案,使用多晶硅图案将模具结构图案化为蚀刻掩模,以形成贯穿模具结构的下部电极孔 形成覆盖多晶硅图案的表面的保护层,在设置有保护层的下电极孔中形成下电极,去除多晶硅图案和保护层以暴露下电极的上侧壁,去除模具结构暴露 下电极的下侧壁,并且依次形成覆盖下电极的电介质和上电极。

    Semiconductor memory devices including support patterns
    3.
    发明授权
    Semiconductor memory devices including support patterns 有权
    半导体存储器件包括支持图案

    公开(公告)号:US09147685B2

    公开(公告)日:2015-09-29

    申请号:US14475844

    申请日:2014-09-03

    IPC分类号: H01L27/108 H01L49/02

    摘要: A capacitor dielectric can be between the storage node and the electrode layer. A supporting pattern can be connected to the storage node, where the supporting pattern can include at least one first pattern and at least one second pattern layered on one another, where the first pattern can include a material having an etch selectivity with respect to the second pattern.

    摘要翻译: 电容器电介质可以在存储节点和电极层之间。 支撑图案可以连接到存储节点,其中支撑图案可以包括至少一个第一图案和彼此分层的至少一个第二图案,其中第一图案可以包括具有相对于第二图案的蚀刻选择性的材料 模式。

    Capacitor structure and semiconductor device including the same

    公开(公告)号:US10665664B2

    公开(公告)日:2020-05-26

    申请号:US15897931

    申请日:2018-02-15

    IPC分类号: H01L49/02 H01L27/108

    摘要: A capacitor structure includes a plurality of bottom electrodes horizontally spaced apart from each other, a support structure covering sidewalls of the bottom electrodes, a top electrode surrounding the support structure and the bottom electrodes, and a dielectric layer interposed between the support structure and the top electrode, and between the top electrode and each of the bottom electrodes. An uppermost surface of the support structure is positioned at a higher level than an uppermost surface of each of the bottom electrodes.

    Capacitor structure and semiconductor device including the same

    公开(公告)号:US09917147B2

    公开(公告)日:2018-03-13

    申请号:US15159809

    申请日:2016-05-20

    IPC分类号: H01L49/02 H01L27/108

    CPC分类号: H01L28/90 H01L27/10852

    摘要: A capacitor structure includes a plurality of bottom electrodes horizontally spaced apart from each other, a support structure covering sidewalls of the bottom electrodes, a top electrode surrounding the support structure and the bottom electrodes, and a dielectric layer interposed between the support structure and the top electrode, and between the top electrode and each of the bottom electrodes. An uppermost surface of the support structure is positioned at a higher level than an uppermost surface of each of the bottom electrodes.

    Capacitor structure and semiconductor device including the same

    公开(公告)号:US11594595B2

    公开(公告)日:2023-02-28

    申请号:US17156773

    申请日:2021-01-25

    IPC分类号: H01L27/108 H01L49/02

    摘要: A capacitor structure includes a plurality of bottom electrodes horizontally spaced apart from each other, a support structure covering sidewalls of the bottom electrodes, a top electrode surrounding the support structure and the bottom electrodes, and a dielectric layer interposed between the support structure and the top electrode, and between the top electrode and each of the bottom electrodes. An uppermost surface of the support structure is positioned at a higher level than an uppermost surface of each of the bottom electrodes.

    Capacitor structure and semiconductor device including the same

    公开(公告)号:US10903310B2

    公开(公告)日:2021-01-26

    申请号:US16787426

    申请日:2020-02-11

    IPC分类号: H01L49/02 H01L27/108

    摘要: A capacitor structure includes a plurality of bottom electrodes horizontally spaced apart from each other, a support structure covering sidewalls of the bottom electrodes, a top electrode surrounding the support structure and the bottom electrodes, and a dielectric layer interposed between the support structure and the top electrode, and between the top electrode and each of the bottom electrodes. An uppermost surface of the support structure is positioned at a higher level than an uppermost surface of each of the bottom electrodes.

    INTEGRATED CIRCUIT DEVICES WITH CAPACITOR AND METHODS OF MANUFACTURING THE SAME
    9.
    发明申请
    INTEGRATED CIRCUIT DEVICES WITH CAPACITOR AND METHODS OF MANUFACTURING THE SAME 有权
    具有电容器的集成电路装置及其制造方法

    公开(公告)号:US20130277802A1

    公开(公告)日:2013-10-24

    申请号:US13790773

    申请日:2013-03-08

    IPC分类号: H01L49/02

    摘要: An integrated circuit device with capacitors and methods of forming the integrated circuit device are provided. The methods may include forming a first lower capacitor electrode pattern on an inner surface of a hole in a mold layer. The first lower capacitor electrode pattern may have a hollow cylindrical shape and an opening in an upper surface. The method may further include forming a second lower capacitor electrode pattern plugging the opening and an upper surface of the second lower capacitor electrode pattern may be planar. The first and the second lower capacitor electrode patterns may comprise a lower capacitor electrode including a void. Additionally, the method may include removing the mold layer to expose the lower capacitor electrode, forming a dielectric layer on the lower capacitor electrode, and forming an upper capacitor electrode layer on the dielectric layer.

    摘要翻译: 提供具有电容器的集成电路器件和形成集成电路器件的方法。 所述方法可以包括在模具层中的孔的内表面上形成第一低电容电极图案。 第一较低电容器电极图案可以具有中空圆柱形形状和在上表面中的开口。 该方法还可以包括形成插入开口的第二下电容器电极图案,并且第二下电容器电极图案的上表面可以是平面的。 第一和第二下部电容器电极图案可以包括包括空隙的下部电容器电极。 此外,该方法可以包括去除模具层以暴露下电容器电极,在下电容器电极上形成电介质层,并在电介质层上形成上电容器电极层。