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公开(公告)号：US10126768B2
公开(公告)日：2018-11-13
申请号：US15392823
申请日：2016-12-28
Applicant: STMICROELECTRONICS S.R.L.
Inventor： Carmelo Burgio , Mauro Giacomini
IPC: G05F1/575
Abstract: A voltage-regulator circuit with a current-adder output node for supplying a load with a load current at a regulated output voltage includes an analog portion sensitive to the output voltage and including one or more reference-voltage sources. The analog portion applies to the current-adder node a first current that is a function of the difference between the output voltage and the reference voltage. A digital portion including an integrator is sensitive to the first current. The integrator is coupled to a current source for applying to the current-adder node a second current so that the first current and the second current supply on the current-adder output a load current at the aforesaid regulated output voltage.
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公开(公告)号：US10651641B2
公开(公告)日：2020-05-12
申请号：US15637766
申请日：2017-06-29
Inventor： Mauro Giacomini , Rajesh Narwal , Pravesh Kumar Saini
Abstract: A circuit includes an input terminal and a regulated supply line for supplying an electronic device with an electrostatic discharge protection and driver circuit for the electronic device. The supply line is coupled to the input terminal via the circuitry, so that current injected into the input terminal may produce a voltage increase on the regulated supply line. A comparator sensitive to the voltage at the input terminal and the voltage on the supply line is provided. A current sink coupled with the supply line and being activatable to sink current from the supply line is also provided. The comparator is configured for activating the current sink as a result of the voltage at the input terminal exceeding the voltage on the supply line of a certain intervention threshold.
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公开(公告)号：US20190050014A1
公开(公告)日：2019-02-14
申请号：US16161983
申请日：2018-10-16
Applicant: STMicroelectronics S.r.l.
Inventor： Carmelo Burgio , Mauro Giacomini
CPC classification number: G05F1/575 , G05F1/10 , G05F1/56 , H02M3/1584 , H02M3/33515 , H02M2001/0045
Abstract: A voltage-regulator circuit with a current-adder output node for supplying a load with a load current at a regulated output voltage includes an analog portion sensitive to the output voltage and including one or more reference-voltage sources. The analog portion applies to the current-adder node a first current that is a function of the difference between the output voltage and the reference voltage. A digital portion including an integrator is sensitive to the first current. The integrator is coupled to a current source for applying to the current-adder node a second current so that the first current and the second current supply on the current-adder output a load current at the aforesaid regulated output voltage.
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Patent Agency Ranking
公开(公告)号：US20180175606A1
公开(公告)日：2018-06-21
申请号：US15637766
申请日：2017-06-29
Inventor： Mauro Giacomini , Rajesh Narwal , Pravesh Kumar Saini
CPC classification number: H02H3/087 , H01L27/0248 , H02H3/04 , H02H3/20 , H02H7/20 , H02H9/042 , H02H9/046 , H02J9/061
Abstract: A circuit includes an input terminal and a regulated supply line for supplying an electronic device with an electrostatic discharge protection and driver circuit for the electronic device. The supply line is coupled to the input terminal via the circuitry, so that current injected into the input terminal may produce a voltage increase on the regulated supply line. A comparator sensitive to the voltage at the input terminal and the voltage on the supply line is provided. A current sink coupled with the supply line and being activatable to sink current from the supply line is also provided. The comparator is configured for activating the current sink as a result of the voltage at the input terminal exceeding the voltage on the supply line of a certain intervention threshold.
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公开(公告)号：US20170329360A1
公开(公告)日：2017-11-16
申请号：US15392823
申请日：2016-12-28
Applicant: STMICROELECTRONICS S.R.L.
Inventor： Carmelo Burgio , Mauro Giacomini
IPC: G05F1/575
CPC classification number: G05F1/575 , G05F1/10 , G05F1/56 , H02M3/1584 , H02M3/33515 , H02M2001/0045
Abstract: A voltage-regulator circuit with a current-adder output node for supplying a load with a load current at a regulated output voltage includes an analog portion sensitive to the output voltage and including one or more reference-voltage sources. The analog portion applies to the current-adder node a first current that is a function of the difference between the output voltage and the reference voltage. A digital portion including an integrator is sensitive to the first current. The integrator is coupled to a current source for applying to the current-adder node a second current so that the first current and the second current supply on the current-adder output a load current at the aforesaid regulated output voltage.
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公开(公告)号：US10591939B2
公开(公告)日：2020-03-17
申请号：US16161983
申请日：2018-10-16
Applicant: STMicroelectronics S.r.l.
Inventor： Carmelo Burgio , Mauro Giacomini
Abstract: A voltage-regulator circuit with a current-adder output node for supplying a load with a load current at a regulated output voltage includes an analog portion sensitive to the output voltage and including one or more reference-voltage sources. The analog portion applies to the current-adder node a first current that is a function of the difference between the output voltage and the reference voltage. A digital portion including an integrator is sensitive to the first current. The integrator is coupled to a current source for applying to the current-adder node a second current so that the first current and the second current supply on the current-adder output a load current at the aforesaid regulated output voltage.
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7.发明授权Method of calibrating a thermometer-code SAR A/D converter and thermometer-code SAR-A/D converter implementing said method 有权校准温度计代码SAR A / D转换器和实施所述方法的温度计代码SAR-A / D转换器的方法公开(公告)号：US09432041B2
公开(公告)日：2016-08-30
申请号：US14683325
申请日：2015-04-10
Applicant: STMICROELECTRONICS S.r.l.
Inventor： Mauro Giacomini , Carmelo Burgio
CPC classification number: H03M1/0809 , H03M1/1033 , H03M1/1057 , H03M1/1245 , H03M1/464 , H03M1/466 , H03M1/687 , H03M1/804 , H03M1/806
Abstract: A method of calibrating a thermometer-code SAR-A/D converter is provided. The thermometer-code SAR-A/D converter includes an Nbit-bit digital-to-analog converter (DAC) for outputting an Nbit-bit output code. The DAC includes a first subconverter having a plurality of NTh thermometer elements Tj and a second subconverter having a plurality of NBin binary-weighted elements. The Nbit output code is equal to the sum of NBitTh and NBitBin where NTh=2NBitTh and NBitBin is equal to NBin=NBitBin. The calibration method includes determining an Integral Non-Linearity error value (εR) of an Rth thermometer-code level of the thermometer elements. The method further includes reducing the highest of the error value εR to obtain a reduced error value, and generating the output code according to said reduced error.
Abstract translation: 提供了一种校准温度计编码SAR-A / D转换器的方法。 温度计编码SAR-A / D转换器包括用于输出N位位输出代码的N位位数/模转换器（DAC）。 DAC包括具有多个NTh温度计元件Tj的第一子转换器和具有多个NBin二进制加权元件的第二子转换器。 Nbit输出代码等于NBitTh和NBitBin之和，其中NTh = 2NBitTh和NBitBin等于NBin = NBitBin。 校准方法包括确定温度计元件的Rth温度计代码电平的积分非线性误差值（εR）。 该方法还包括减小误差值εR的最高值以获得减小的误差值，以及根据所述减小的误差产生输出代码。
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8.发明授权Method of calibrating a SAR A/D converter and SAR-A/D converter implementing said method 有权实施所述方法的SAR A / D转换器和SAR-A / D转换器的校准方法公开(公告)号：US09362937B1
公开(公告)日：2016-06-07
申请号：US14835110
申请日：2015-08-25
Applicant: STMICROELECTRONICS S.R.L.
Inventor： Carmelo Burgio , Mauro Giacomini
CPC classification number: H03M1/1047 , H03M1/00 , H03M1/0695 , H03M1/1033 , H03M1/12 , H03M1/1245 , H03M1/462 , H03M1/466 , H03M1/687 , H03M1/802 , H03M1/804 , H03M1/806 , H03M1/808
Abstract: The present disclosure relates to a method of self-calibration of a successive approximation register-analog-to-digital converter. The method includes measuring an error value for each thermometer element of a plurality of thermometer elements and determining a mean value of measured error values. The method also includes generating a thermometer scale where each level of the thermometer scale will be an incremental sum of each value of a first subset, and each further level of the thermometer scale will be a sum of all values of a second subset plus the incremental sum of the elements of the first subset in any order. In addition, the method includes generating the output code according to the thermometer scale.
Abstract translation: 本公开涉及逐次逼近寄存器 - 模数转换器的自校准方法。 该方法包括测量多个温度计元件中每个温度计元件的误差值，并确定测量误差值的平均值。 该方法还包括生成温度计量表，其中温度计量表的每个水平将是第一子集的每个值的增量和，并且温度计量度的每个进一步水平将是第二子集的所有值加上增量 任何顺序的第一个子集元素的总和。 此外，该方法包括根据温度计量程生成输出代码。
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