公开(公告)号：US20220190140A1

公开(公告)日：2022-06-16

申请号：US17685780

申请日：2022-03-03

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics SA

Inventor： Alexis GAUTHIER ,  Pascal CHEVALIER

IPC: H01L29/66 ,  H01L29/06 ,  H01L29/08 ,  H01L29/732

Abstract: A bipolar transistor includes a collector. The collector is formed by: a first portion of the collector which extends under an insulating trench, and a second portion of the collector which crosses through the insulating trench. The first and second portions of the collector are in physical contact.

公开(公告)号：US20240063290A1

公开(公告)日：2024-02-22

申请号：US18383926

申请日：2023-10-26

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics SA

Inventor： Alexis GAUTHIER ,  Pascal CHEVALIER

IPC: H01L29/66 ,  H01L29/06 ,  H01L29/08 ,  H01L29/732

CPC classification number: H01L29/66272 ,  H01L29/0649 ,  H01L29/0821 ,  H01L29/732 ,  H01L21/26513

Abstract: A bipolar transistor includes a collector. The collector is formed by: a first portion of the collector which extends under an insulating trench, and a second portion of the collector which crosses through the insulating trench. The first and second portions of the collector are in physical contact.

公开(公告)号：US20220013654A1

公开(公告)日：2022-01-13

申请号：US17486000

申请日：2021-09-27

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics SA

Inventor： Alexis GAUTHIER ,  Pascal CHEVALIER

IPC: H01L29/66 ,  H01L21/22 ,  H01L29/06 ,  H01L29/73

Abstract: A bipolar transistor includes a collector. The collector is produced by a process wherein a first substantially homogeneously doped layer is formed at the bottom of a cavity. A second gradually doped layer is then formed by diffusion of dopants of the first substantially homogeneously doped layer.

公开(公告)号：US20210057521A1

公开(公告)日：2021-02-25

申请号：US16995079

申请日：2020-08-17

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Alexis GAUTHIER ,  Pascal CHEVALIER ,  Gregory AVENIER

IPC: H01L29/06 ,  H01L29/66 ,  H01L21/8222 ,  H01L29/732

Abstract: A transistor is produced by forming a first part of a first region of the transistor in a semiconductor substrate by implanting dopants through an opening in an isolating trench formed at an upper surface of the semiconductor substrate. A second region of the transistor in the opening by epitaxy.

公开(公告)号：US20190267473A1

公开(公告)日：2019-08-29

申请号：US16407383

申请日：2019-05-09

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Alexis GAUTHIER ,  Guillaume C. RIBES

IPC: H01L29/66 ,  H01L29/78 ,  H01L49/00 ,  H01L29/12 ,  H01L21/28 ,  H01L21/02 ,  H01L29/423

Abstract: A vertical transistor includes two portions of a gate conductor that extend within a layer of insulator. An opening extending through the later of insulator includes source, channel and drain regions form by epitaxy operations. A thickness of the portions of the gate conductor decreases in the vicinity of the channel region.

公开(公告)号：US20220149151A1

公开(公告)日：2022-05-12

申请号：US17584593

申请日：2022-01-26

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Alexis GAUTHIER ,  Pascal CHEVALIER ,  Gregory AVENIER

IPC: H01L29/06 ,  H01L29/66 ,  H01L29/732

Abstract: A device including a transistor is fabricated by forming a first part of a first region of the transistor through the implantation of dopants through a first opening. The second region of the transistor is then formed in the first opening by epitaxy.

公开(公告)号：US20220130728A1

公开(公告)日：2022-04-28

申请号：US17568500

申请日：2022-01-04

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Pascal CHEVALIER ,  Alexis GAUTHIER ,  Gregory AVENIER

IPC: H01L21/8222 ,  H01L21/265 ,  H01L27/06 ,  H01L29/06 ,  H01L29/66 ,  H01L29/737 ,  H01L29/93

Abstract: At least one bipolar transistor and at least one variable capacitance diode are jointly produced by a method on a common substrate.

公开(公告)号：US20220122969A1

公开(公告)日：2022-04-21

申请号：US17503621

申请日：2021-10-18

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Edoardo BREZZA ,  Alexis GAUTHIER

IPC: H01L27/082 ,  H01L29/737 ,  H01L21/265 ,  H01L21/225 ,  H01L29/66 ,  H01L21/8222

Abstract: A bipolar transistor includes a collector region having a first doped portion located in a substrate and a second doped portion covering and in contact with an area of the first doped portion. The collector region has a doping profile having a peak in the first portion and a decrease from this peak up to in the second portion.

公开(公告)号：US20240162329A1

公开(公告)日：2024-05-16

申请号：US18387325

申请日：2023-11-06

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Alexis GAUTHIER ,  Pascal CHEVALIER ,  Edoardo BREZZA ,  Nicolas GUITARD

IPC: H01L29/66 ,  H01L29/08 ,  H01L29/10 ,  H01L29/737

CPC classification number: H01L29/66242 ,  H01L29/0817 ,  H01L29/1004 ,  H01L29/6653 ,  H01L29/66553 ,  H01L29/6656 ,  H01L29/737

Abstract: An electronic device includes an insulating first layer covering a second layer made of a doped semiconductor material. A cavity is formed to cross through the first layer and reach the second layer. Insulating spacers are forming against lateral walls of the cavity. A first doped semiconductor region fills the cavity. The first doped semiconductor region has a doping concentration decreasing from the second layer.

公开(公告)号：US20200013856A1

公开(公告)日：2020-01-09

申请号：US16571532

申请日：2019-09-16

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Pascal CHEVALIER ,  Alexis GAUTHIER

IPC: H01L29/08 ,  H01L29/66 ,  H01L29/732 ,  H01L29/737

Abstract: A bipolar transistor is supported by a single-crystal silicon substrate including a collector connection region. A first epitaxial region forms a collector region doped with a first conductivity type on the collector connection region. The collector region includes a counter-doped region of a second conductivity type. A second epitaxial region forms a base region of a second conductivity type on the first epitaxial region. Deposited semiconductor material forms an emitter region of the first conductivity type on the second epitaxial region. The collector region, base region and emitter region are located within an opening formed in a stack of insulating layers that includes a sacrificial layer. The sacrificial layer is selectively removed to expose a side wall of the base region. Epitaxial growth from the exposed sidewall forms a base contact region.