公开(公告)号：US20030100154A1

公开(公告)日：2003-05-29

申请号：US10285363

申请日：2002-10-30

Applicant: STMicroelectronics S.r.I.

Inventor： Ferruccio Frisina ,  Antonio Pinto ,  Angelo Magri

IPC: H01L021/336

CPC classification number: H01L24/10 ,  H01L23/485 ,  H01L23/49562 ,  H01L24/13 ,  H01L24/37 ,  H01L24/40 ,  H01L24/48 ,  H01L24/73 ,  H01L29/41741 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/48247 ,  H01L2224/73221 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/85399 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/37099

Abstract: An electronic power device of improved structure is fabricated with MOS technology to have a gate finger region and corresponding source regions on either sides of the gate region. This device has a first-level metal layer arranged to independently contact the gate region and source regions, and has a protective passivation layer arranged to cover the gate region. Advantageously, a wettable metal layer, deposited onto the passivation layer and the first-level metal layer, overlies said source regions. In this way, the additional wettable metal layer is made to act as a second-level metal.

Abstract translation: 利用MOS技术制造具有改进结构的电子功率器件，以在栅极区域的两侧具有栅极指状区域和相应的源极区域。 该器件具有布置成独立地接触栅极区域和源极区域的第一级金属层，并且具有覆盖栅极区域的保护性钝化层。 有利地，沉积在钝化层和第一级金属层上的可湿性金属层覆盖在所述源极区域上。 以这种方式，使附加的可湿性金属层作为二级金属。

公开(公告)号：US20020123195A1

公开(公告)日：2002-09-05

申请号：US10006778

申请日：2001-11-05

Applicant: STMicroelectronics S.r.I

Inventor： Ferruccio Frisina ,  Giuseppe Ferla ,  Salvatore Rinaudo

IPC: H01L021/336

CPC classification number: H01L29/7802 ,  H01L29/0847 ,  H01L29/66712

Abstract: A MOS-gated power device includes a plurality of elementary functional units, each elementary functional unit including a body region of a first conductivity type formed in a semiconductor material layer of a second conductivity type having a first resistivity value. Under each body region a respective lightly doped region of the second conductivity type is provided having a second resistivity value higher than the first resistivity value.

Abstract translation: MOS门控功率器件包括多个基本功能单元，每个基本功能单元包括形成在具有第一电阻率值的第二导电类型的半导体材料层中的第一导电类型的体区。 在每个体区下方提供具有高于第一电阻率值的第二电阻率值的第二导电类型的相应轻掺杂区。

公开(公告)号：US20030201503A1

公开(公告)日：2003-10-30

申请号：US10430771

申请日：2003-05-06

Applicant: STMicroelectronics, S.r.I.

Inventor： Ferruccio Frisina

IPC: H01L029/76

CPC classification number: H01L29/7802 ,  H01L29/0619 ,  H01L29/0634 ,  H01L29/66712

Abstract: MOS-gated power device including a plurality of elementary functional units, each elementary functional unit including a body region of a first conductivity type formed in a semiconductor material layer of a second conductivity type. A plurality of doped regions of a first conductivity type is formed in the semiconductor material layer, each one of the doped regions being disposed under a respective body region and being separated from other doped regions by portions of the semiconductor material layer.

Abstract translation: 包括多个基本功能单元的MOS门控功率器件，每个基本功能单元包括形成在第二导电类型的半导体材料层中的第一导电类型的体区。 在半导体材料层中形成第一导电类型的多个掺杂区域，每个掺杂区域设置在相应的主体区域下方，并且通过半导体材料层的一部分与其它掺杂区域分离。