公开(公告)号：US20040227207A1

公开(公告)日：2004-11-18

申请号：US10667113

申请日：2003-09-18

Applicant: STMicroelectronics S.r.l.

Inventor： Gabriele Barlocchi ,  Flavio Villa

IPC: H01L029/00 ,  H01L021/331

CPC classification number: H01L21/2007 ,  H01L21/30608 ,  H01L21/3086 ,  H01L21/76251 ,  H01L21/76262 ,  H01L21/764

Abstract: A method of forming buried cavities in a wafer of monocrystalline semiconductor material with at least one cavity formed in a substrate of monocrystalline semiconductor material by timed TMAH etching silicon; covering the cavity with a material inhibiting epitaxial growth; and growing a monocrystalline epitaxial layer above the substrate and the cavities. Thereby, the cavity is completely surrounded by monocrystalline material. Starting from this wafer, it is possible to form a thin membrane. The original wafer must have a plurality of elongate cavities or channels, parallel and adjacent to one another. Trenches are then excavated in the epitaxial layer as far as the channels, and the dividers between the channels are removed by timed TMAH etching.

Abstract translation: 在单晶半导体材料的晶片中形成掩埋空穴的方法，其中至少一个腔通过定时TMAH蚀刻硅在单晶半导体材料的衬底中形成; 用抑制外延生长的材料覆盖空腔; 以及在衬底和空腔上生长单晶外延层。 因此，腔体被单晶材料完全包围。 从该晶片开始，可以形成薄膜。 原始晶片必须具有彼此平行并相邻的多个细长空腔或通道。 然后在外延层中挖沟直到沟道，并且通过定时TMAH蚀刻去除沟道之间的分隔线。

公开(公告)号：US20030148588A1

公开(公告)日：2003-08-07

申请号：US10331189

申请日：2002-12-26

Applicant: STMicroelectronics S.r.l.

Inventor： Flavio Villa ,  Gabriele Barlocchi ,  Pietro Corona

IPC: H01L021/76

CPC classification number: H01L21/76262 ,  H01L21/31662 ,  H01L21/76208

Abstract: For manufacturing an SOI substrate, the following steps are carried out: providing a wafer of semiconductor material; forming, inside the wafer, a plurality of passages forming a labyrinthine cavity and laterally delimiting a plurality of pillars of semiconductor material; and oxidizing the pillars of semiconductor material to form a buried insulating layer. For forming the labyrinthine cavity, a trench is first formed in a substrate; an epitaxial layer is grown, which closes the trench at the top; the wafer is annealed so as to deform the pillars and cause them to assume a minimum-energy handlebar-like shape, and a peripheral portion of the wafer is removed to reach the labyrinthine cavity, and side inlet openings are formed in the labyrinthine cavity. Oxidation is performed by feeding an oxidizing fluid through the side inlet openings.

Abstract translation: 为了制造SOI衬底，进行以下步骤：提供半导体材料的晶片; 在所述晶片内部形成多个通道，所述多个通道形成迷宫腔并横向界定多个半导体材料柱; 并氧化半导体材料的柱以形成掩埋绝缘层。 为了形成迷宫腔，首先在衬底中形成沟槽; 生长外延层，其封闭顶部的沟槽; 将晶片退火以使柱变形并使其呈现最小能量手柄形状，并且移除晶片的周边部分以到达迷宫腔，并且在迷宫腔中形成侧入口。 氧化是通过将侧面入口进入氧化流体进行的。

公开(公告)号：US20030057199A1

公开(公告)日：2003-03-27

申请号：US10128989

申请日：2002-04-22

Applicant: STMicroelectronics S.r.l.

Inventor： Flavio Villa ,  Gabriele Barlocchi ,  Manlio Gennaro Torchia ,  Ubaldo Mastromatteo

IPC: H05B003/00

CPC classification number: B01L7/525 ,  B01J19/0093 ,  B01J2219/00783 ,  B01J2219/00822 ,  B01J2219/00828 ,  B01J2219/0086 ,  B01J2219/00873 ,  B01J2219/00961 ,  B01J2219/00986 ,  B01L3/5027 ,  B01L3/502707 ,  B01L2300/1827 ,  B01L2300/185 ,  B01L2300/1883 ,  B01L2300/1894

Abstract: An integrated device based upon semiconductor technology, in particular a chemical microreactor, including a semiconductor body having a high-temperature operating portion and a low-temperature operating portion. The semiconductor body is provided with a thermal-insulation device including a dissipator element arranged between the high-temperature operating portion and the low-temperature operating portion. The dissipator includes a membrane connecting the high-temperature operating portion and the low-temperature operating portion, and a plurality of diaphragms that extend substantially orthogonal to the membrane and are parallel to one another.

Abstract translation: 基于半导体技术的集成器件，特别是化学微反应器，包括具有高温操作部分和低温操作部分的半导体本体。 半导体本体设置有绝热装置，其包括设置在高温操作部和低温操作部之间的耗散元件。 散热器包括连接高温操作部分和低温操作部分的膜，以及基本上垂直于膜并且彼此平行延伸的多个膜片。

公开(公告)号：US20040226908A1

公开(公告)日：2004-11-18

申请号：US10874905

申请日：2004-06-23

Applicant: STMicroelectronics S.r.l.

Inventor： Gabriele Barlocchi ,  Flavio Villa

IPC: H01L029/76

CPC classification number: B01L7/52 ,  B01L3/502707 ,  B01L2200/12 ,  B01L2300/0645 ,  B01L2300/0825 ,  B01L2300/1827 ,  B01L2300/1883

Abstract: Integrated microreactor, formed in a monolithic body and including a semiconductor material region and an insulating layer; a buried channel extending in the semiconductor material region; a first and a second access trench extending in the semiconductor material region and in the insulating layer, and in communication with the buried channel; a first and a second reservoir formed on top of the insulating layer and in communication with the first and the second access trench; a suspended diaphragm formed by the insulating layer, laterally to the buried channel; and a detection electrode, supported by the suspended diaphragm, above the insulating layer, and inside the second reservoir.

公开(公告)号：US20040106290A1

公开(公告)日：2004-06-03

申请号：US10712211

申请日：2003-11-12

Applicant: STMicroelectronics S.r.l.

Inventor： Pietro Erratico ,  Enrico Sacchi ,  Flavio Villa ,  Gabriele Barlocchi ,  Pietro Corona

IPC: H01L021/302 ,  H01L021/461

CPC classification number: B81C1/00404

Abstract: The process comprises the steps of forming, on top of a semiconductor material wafer, a holed mask having a lattice structure and comprising a plurality of openings each having a substantially square shape and a side with an inclination of 45null with respect to the flat of the wafer; carrying out an anisotropic etch in TMAH of the wafer, using said holed mask, thus forming a cavity, the cross section of which has the shape of an upside-down isosceles trapezium; and carrying out a chemical vapor deposition using TEOS, thus forming a TEOS layer which completely closes the openings of the holed mask and defines a diaphragm overlying the cavity and on which a suspended integrated structure can subsequently be manufactured.

Abstract translation: 该方法包括以下步骤：在半导体材料晶片的顶部上形成具有格子结构的孔掩模，并且包括多个开口，每个开口具有大致正方形的形状，并且相对于平面的平面倾斜45° 晶圆; 在晶片的TMAH中进行各向异性蚀刻，使用所述带孔掩模，从而形成空腔，其横截面具有倒立的等腰梯形的形状; 并且使用TEOS进行化学气相沉积，由此形成TEOS层，其完全封闭了孔罩的开口，并且限定了覆盖在空腔上的隔膜，并且随后可以制造悬浮的一体结构。