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公开(公告)号:US10116267B2
公开(公告)日:2018-10-30
申请号:US15603004
申请日:2017-05-23
发明人: Stefano Polesel , Germano Nicollini
摘要: An amplifier circuit a differential input stage coupled to a first input and to a second input between which a differential input voltage is present. A converter stage is coupled to the input stage to convert the differential input voltage into a converted voltage. An output stage is coupled to the converter stage and generates, starting from the converted voltage, an output voltage on a single output of the amplifier circuit. A biasing stage is coupled to the input stage and to the output stage to supply a biasing current. A chopper module reduces a contribution of offset and noise associated with the output voltage. The chopper module is coupled to the input stage, converter stage, and to the biasing stage. The chopper module includes an input chopper stage, a converter chopper stage, and a biasing chopper stage that operate jointly under control of a chopper signal.
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公开(公告)号:US20180123524A1
公开(公告)日:2018-05-03
申请号:US15603004
申请日:2017-05-23
发明人: Stefano Polesel , Germano Nicollini
CPC分类号: H03F1/26 , H03F3/387 , H03F3/393 , H03F3/45183 , H03F3/4521 , H03F3/45475 , H03F3/45775 , H03F2200/271 , H03F2200/453 , H03F2200/456 , H03F2203/45212 , H03F2203/45644 , H03F2203/45692
摘要: An amplifier circuit a differential input stage coupled to a first input and to a second input between which a differential input voltage is present. A converter stage is coupled to the input stage to convert the differential input voltage into a converted voltage. An output stage is coupled to the converter stage and generates, starting from the converted voltage, an output voltage on a single output of the amplifier circuit. A biasing stage is coupled to the input stage and to the output stage to supply a biasing current. A chopper module reduces a contribution of offset and noise associated with the output voltage. The chopper module is coupled to the input stage, converter stage, and to the biasing stage. The chopper module includes an input chopper stage, a converter chopper stage, and a biasing chopper stage that operate jointly under control of a chopper signal.
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公开(公告)号:US11716061B2
公开(公告)日:2023-08-01
申请号:US17665399
申请日:2022-02-04
CPC分类号: H03F3/45273 , H03F3/45269 , H03F2203/45526
摘要: A circuit for startup of a multi-stage amplifier circuit includes a pair of input nodes and at least two output nodes configured to be coupled to a multi-stage amplifier circuit. A startup differential stage includes a differential pair of transistors having respective control terminals coupled to the pair of input nodes, and each transistor in the differential pair of transistors has a respective current path therethrough between a respective output node and a common source terminal. The startup differential stage is configured to sense a common mode voltage drop at a first differential stage of the multi-stage amplifier circuit. Current mirror circuitry includes a plurality of transistors coupled to the common terminal of the differential pair of transistors and coupled to two output nodes of the at least two output nodes.
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公开(公告)号:US11537153B2
公开(公告)日:2022-12-27
申请号:US16459169
申请日:2019-07-01
摘要: A voltage reference circuit includes a first circuit block configured to generate a proportional to absolute temperature current, the first circuit block comprising a current mirror amplifier, a second circuit block coupled to the first circuit block and configured to generated a complimentary to absolute temperature current, and a third circuit block coupled to both the first circuit block and the second circuit block. The second circuit block includes a multi-stage common-source amplifier. The third circuit block is configured to combine the proportional to absolute temperature current and the complimentary to absolute temperature current to generate a reference voltage at an output of the voltage reference circuit.
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公开(公告)号:US11290124B2
公开(公告)日:2022-03-29
申请号:US17163230
申请日:2021-01-29
IPC分类号: H03M3/00
摘要: A delta-sigma modulation circuit has a sampling period and, in operation, generates a delta-sigma modulated signal based on the analog input signal. The delta-sigma modulation circuit includes: a first integrator; an analog-to-digital converter; a feedback-loop coupled between an input of the first integrator and the output interface; a second integrator coupled between the first integrator and the analog-to-digital converter. The delta-sigma modulation circuit has loop-delay compensation circuitry having a plurality of switches. The loop delay compensation circuitry, in operation, controls the plurality of switches based on a time interval of a duration of half the sampling period and generates a loop-delay compensation signal.
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公开(公告)号:US10439569B2
公开(公告)日:2019-10-08
申请号:US15984942
申请日:2018-05-21
摘要: A switching amplifier, such as a Class D amplifier, includes a current sensing circuit. The current sensing circuit is formed by replica loop circuits that are selectively coupled to corresponding output inverter stages of the switching amplifier. The replica loop circuits operated to produce respective replica currents of the output currents generated by the output inverter stages. A sensing circuitry is coupled to receive the replica currents from the replica loop circuits and operates to produce an output sensing signal as a function of the respective replica currents.
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公开(公告)号:US10033352B2
公开(公告)日:2018-07-24
申请号:US15053176
申请日:2016-02-25
IPC分类号: G01C17/38 , H03H11/18 , G01C19/5776 , G01C25/00
摘要: A phase shifter, which carries out a ninety-degree phase shift of a sinusoidal input signal having an input frequency, at the same input frequency, envisages: a continuous-time all-pass filter stage, which receives the sinusoidal input signal and generates an output signal phase-shifted by 90° at a phase-shift frequency that is a function of a RC time constant of the all-pass filter stage; and a calibration stage, which is coupled to the all-pass filter stage and generates a calibration signal for the all-pass filter stage, such that the phase-shift frequency is equal to the input frequency of the sinusoidal input signal, irrespective of variations of the value of the input frequency and/or of the RC time constant with respect to a nominal value.
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公开(公告)号:US20180026618A1
公开(公告)日:2018-01-25
申请号:US15394472
申请日:2016-12-29
IPC分类号: H03K5/24
CPC分类号: H03K5/2481 , G01R19/0038 , H03F3/45179 , H03F3/45273 , H03K3/0377 , H03K5/24
摘要: A comparator circuit including: a first node and a second node, which receive a first current and a second current, respectively; a first current mirror, which includes a first load transistor and a first output transistor; and a second current mirror, which includes a second load transistor and a second output transistor. The comparator circuit further includes: a first feedback transistor and a second feedback transistor cross-coupled together, the control terminals of the first and second feedback transistors being connected to the first and second nodes, respectively; a first resistor, having a first terminal, which is connected to the control terminal of the first load transistor, and a second terminal, which is connected to the first node and to the control terminal of the first output transistor; and a second resistor, having a first terminal, connected to the control terminal of the second load transistor, and a second terminal, connected to the second node and to the control terminal of the second output transistor.
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公开(公告)号:US20160173992A1
公开(公告)日:2016-06-16
申请号:US14858997
申请日:2015-09-18
发明人: Germano Nicollini , Silvia Adorno , Andrea Barbieri , Federica Barbieri , Sebastiano Conti , Edoardo Marino , Sergio Pernici
CPC分类号: H04R19/005 , H04R19/02 , H04R19/04 , H04R2201/003 , H04R2499/11 , H04R2499/15
摘要: A MEMS acoustic transducer has: a detection structure, which generates an electrical detection quantity as a function of a detected acoustic signal; and an electronic interface circuit, which is operatively coupled to the detection structure and generates an electrical output quantity as a function of the electrical detection quantity. The detection structure has a first micromechanical structure of a capacitive type and a second micromechanical structure of a capacitive type, each including a membrane that faces and is capacitively coupled to a rigid electrode and defines a respective first detection capacitor and second detection capacitor; the electronic interface circuit defines an electrical connection in series of the first detection capacitor and second detection capacitor between a biasing line and a reference line, and further has a first single-output amplifier and a second single-output amplifier, which are coupled to a respective one of the first detection capacitor and the second detection capacitor and have a respective first output terminal and second output terminal, between which the electrical output quantity is present.
摘要翻译: MEMS声换能器具有:检测结构,其产生作为检测到的声信号的函数的电检测量; 以及电子接口电路,其可操作地耦合到所述检测结构并且产生作为所述电检测量的函数的电输出量。 该检测结构具有电容型的第一微机械结构和电容式的第二微机械结构,每个微机械结构均包括面对电容耦合到刚性电极并且限定相应的第一检测电容器和第二检测电容器的膜; 电子接口电路在偏置线和参考线之间限定了第一检测电容器和第二检测电容器串联的电连接,并且还具有第一单输出放大器和第二单输出放大器,其耦合到 第一检测电容器和第二检测电容器中的一个,并且具有各自的第一输出端子和第二输出端子,其间存在电输出量。
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公开(公告)号:US11637562B2
公开(公告)日:2023-04-25
申请号:US17677511
申请日:2022-02-22
摘要: A delta-sigma modulation circuit has a sampling period and, in operation, generates a delta-sigma modulated signal based on the analog input signal. The delta-sigma modulation circuit includes: a first integrator; an analog-to-digital converter; a feedback-loop coupled between an input of the first integrator and the output interface; a second integrator coupled between the first integrator and the analog-to-digital converter. The delta-sigma modulation circuit has loop-delay compensation circuitry having a plurality of switches. The loop delay compensation circuitry, in operation, controls the plurality of switches based on a time interval of a duration of half the sampling period and generates a loop-delay compensation signal.
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