公开(公告)号：US20250057011A1

公开(公告)日：2025-02-13

申请号：US18663084

申请日：2024-05-14

Applicant: Samsung Display Co., Ltd.

Inventor： Jonghwan Shin ,  Moosoon Ko ,  Yongho Yang ,  Yuri Oh ,  Kibok Yoo ,  Donghyeok Lee ,  Jongchan Lee ,  Jinsuk Lee

IPC: H10K59/80 ,  H10K59/122 ,  H10K102/00

Abstract: For a display apparatus capable of preventing gas emission from a spacer, the display apparatus includes a substrate, at least one thin-film transistor disposed on the substrate, a pixel electrode layer disposed on the at least one thin-film transistor and including at least one pixel electrode, a pixel-defining layer disposed on the pixel electrode layer and covering edges of the at least one pixel electrode, a spacer disposed on the pixel-defining layer, and a first protective layer disposed on the spacer, wherein the pixel-defining layer includes a trench arranged around the spacer.

公开(公告)号：US20240324345A1

公开(公告)日：2024-09-26

申请号：US18508641

申请日：2023-11-14

Applicant: Samsung Display Co., Ltd.

Inventor： Jonghwan Shin ,  Yuri Oh ,  Kibok Yoo ,  Donghyeok Lee ,  Jongchan Lee ,  Jinsuk Lee

IPC: H10K59/131 ,  H10K59/124 ,  H10K59/88

CPC classification number: H10K59/131 ,  H10K59/124 ,  H10K59/88 ,  H10K2102/351

Abstract: A display panel includes an opening area, a display area surrounding at least a portion of the opening area, and an intermediate area between the opening area and the display area in a plan view, a light-emitting diode arranged on a substrate in the display area and including a pixel electrode, an opposite electrode, and an intermediate layer, a support layer arranged on the substrate in the intermediate area, an organic insulating layer arranged on the substrate and the support layer and having a groove corresponding to the support layer, a metal layer arranged on the organic insulating layer and having a protrusion tip, and a cover layer including a first cover portion covering an upper surface and a side surface of the metal layer and a second cover portion arranged in the groove. The functional layer extends to the intermediate area and includes a dummy functional layer.

公开(公告)号：US10910477B2

公开(公告)日：2021-02-02

申请号：US16781081

申请日：2020-02-04

Applicant: Samsung Display Co., LTD.

Inventor： Jongchan Lee ,  Taehoon Yang ,  Woonghee Jeong ,  Kyoungwon Lee ,  Yongsu Lee

IPC: H01L21/44 ,  H01L21/02 ,  H01L29/417 ,  H01L29/66 ,  H01L27/12 ,  H01L29/786

Abstract: A display device includes a first insulation layer on a first gate electrode, an active pattern on the first insulation layer and including an NMOS area and a PMOS area, the PMOS area overlapping the first gate electrode, a second insulation layer on the active pattern. The active pattern includes an NMOS area and a PMOS area, with the PMOS area overlapping the first gate electrode. In addition, a second gate electrode is on the second insulation layer and overlaps the NMOS area. An active-protecting pattern is in the same layer as the second gate electrode and passes through the second insulation layer to contact the PMOS area. A third insulation layer is on the active-protecting pattern and the second gate electrode. A data metal electrode passes through the third insulation layer and contacts the active-protecting pattern.

公开(公告)号：US09515154B2

公开(公告)日：2016-12-06

申请号：US14597563

申请日：2015-01-15

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jongchan Lee ,  Yoonho Khang ,  Myounghwa Kim ,  Joonhwa Bae ,  Myounggeun Cha

IPC: H01L29/45 ,  H01L21/285 ,  H01L29/786 ,  H01L29/417 ,  H01L29/66 ,  H01L21/02

CPC classification number: H01L21/823418 ,  H01L21/02422 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/02667 ,  H01L21/02672 ,  H01L21/28518 ,  H01L21/32053 ,  H01L27/1222 ,  H01L27/1274 ,  H01L27/1277 ,  H01L27/3262 ,  H01L29/41733 ,  H01L29/458 ,  H01L29/66765 ,  H01L29/78618 ,  H01L29/78678

Abstract: A thin film transistor includes a polysilicon layer on a substrate, which includes a first area between second and third areas. A polysilicon layer is formed on the substrate, and a source electrode and a drain electrode are formed on the polysilicon layer in the first and third areas. Each of the source electrode and the drain electrode includes a metal silicide layer adjacent the polysilicon layer.

Abstract translation: 薄膜晶体管包括在基板上的多晶硅层，其包括第二和第三区域之间的第一区域。 在基板上形成多晶硅层，在第一和第三区域的多晶硅层上形成源电极和漏电极。 源电极和漏电极中的每一个包括与多晶硅层相邻的金属硅化物层。

公开(公告)号：US12035585B2

公开(公告)日：2024-07-09

申请号：US17298616

申请日：2019-05-08

Applicant: Samsung Display Co., Ltd.

Inventor： Juwon Yoon ,  Sanghee Jang ,  Kibum Kim ,  Taehoon Yang ,  Jeonghyun Lee ,  Jongchan Lee ,  Pilsuk Lee ,  Woonghee Jeong

IPC: H10K59/131

CPC classification number: H10K59/131

Abstract: An embodiment of the present disclosure comprises a display device including a substrate including a display area and a peripheral area around the display area, a thin-film transistor on the substrate in the display area and a display element electrically connected to the thin-film transistor, and a first voltage line and a second voltage line located on the substrate in the peripheral area and supplying power for driving the display element, wherein the first voltage line is a common voltage line and entirely surrounds the display area, the second voltage line is a driving voltage line and is arranged to correspond to one side of the display area, and the first voltage line and the second voltage line are on different layers.

公开(公告)号：US11730022B2

公开(公告)日：2023-08-15

申请号：US16943744

申请日：2020-07-30

Applicant: Samsung Display Co., Ltd.

Inventor： Jongchan Lee ,  Taehee Lee

IPC: H10K59/124 ,  H10K59/122 ,  H10K59/123 ,  H10K59/121 ,  H10K59/12

CPC classification number: H10K59/124 ,  H10K59/122 ,  H10K59/123 ,  H10K59/1216 ,  H10K59/1201

Abstract: A display device includes a substrate including a pixel area and a transmission area; a plurality of insulating layers on the pixel area and the transmission area; a first conductive layer on the plurality of insulating layers of the pixel area, the first conductive layer including a first sidewall having a first inclination angle and a second sidewall having a second inclination angle different from the first inclination angle; a first spacer located on a same layer as the first conductive layer, the first spacer being at a boundary between the pixel area and the transmission area and extending to the pixel area and the transmission area; and a first planarization layer on the first conductive layer.

公开(公告)号：US20200051506A1

公开(公告)日：2020-02-13

申请号：US16656873

申请日：2019-10-18

Applicant: Samsung Display Co., Ltd.

Inventor： Taehoon Yang ,  Jongchan Lee ,  Woonghee Jeong

IPC: G09G3/3258 ,  H01L27/32 ,  G09G3/3233

Abstract: A pixel, wherein: gates of second and fifth transistors receive a first gate signal; gates of third and fourth transistors respectively receive second and third gate signals; first terminals (FTs) of the second to fifth transistors respectively receive a data voltage, reference voltage, initialization voltage, and first power supply voltage (PSV); a second electrode of a second capacitor receives the first PSV; a second terminal (ST) of a light emitting element (LEE) receives a second PSV; a gate of a first transistor, STs of the second and third transistors, and a first electrode of a first capacitor are connected to a first node; STs of the first and fourth transistors, a FT of the LEE, and second and first electrodes respectively of the first and second capacitors are connected to a second node; and a ST of the fifth transistor is connected to a FT of the first transistor.

公开(公告)号：US10482821B2

公开(公告)日：2019-11-19

申请号：US16034359

申请日：2018-07-13

Applicant: Samsung Display Co., Ltd.

Inventor： Taehoon Yang ,  Jongchan Lee ,  Woonghee Jeong

IPC: G09G5/10 ,  G09G3/3258 ,  H01L27/32

Abstract: A pixel, wherein: gates of second and fifth transistors receive a first gate signal; gates of third and fourth transistors respectively receive second and third gate signals; first terminals (FTs) of the second to fifth transistors respectively receive a data voltage, reference voltage, initialization voltage, and first power supply voltage (PSV); a second electrode of a second capacitor receives the first PSV; a second terminal (ST) of a light emitting element (LEE) receives a second PSV; a gate of a first transistor, STs of the second and third transistors, and a first electrode of a first capacitor are connected to a first node; STs of the first and fourth transistors, a FT of the LEE, and second and first electrodes respectively of the first and second capacitors are connected to a second node; and a ST of the fifth transistor is connected to a FT of the first transistor.

公开(公告)号：US20160064425A1

公开(公告)日：2016-03-03

申请号：US14721505

申请日：2015-05-26

Applicant: Samsung Display Co., Ltd.

Inventor： Myounghwa KIM ,  Jaewook Kang ,  Joohee Jeon ,  Jongchan Lee ,  Yoonho Khang

IPC: H01L27/12 ,  H01L29/49 ,  G02F1/1362 ,  H01L29/786 ,  H01L27/32 ,  G02F1/1368 ,  H01L29/423 ,  H01L29/45

CPC classification number: H01L27/1255 ,  G02F1/136213 ,  G02F1/1368 ,  H01L27/1222 ,  H01L27/1288 ,  H01L27/3258 ,  H01L27/3262 ,  H01L27/3265 ,  H01L29/42372 ,  H01L29/42384 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/4966 ,  H01L29/78666 ,  H01L29/78675 ,  H01L2227/323

Abstract: Provided is a thin film transistor array substrate having at least one thin film transistor. The thin film transistor includes a semiconductor layer having a channel area with a first doping concentration on a substrate, a source-drain area disposed at opposite sides of the channel area and with a second doping concentration greater than the first doping concentration, and a substantially undoped area extending from the source-drain area. The substrate has a gate insulating layer on the semiconductor layer and a gate electrode disposed on the gate insulating layer and overlapping the channel area in at least some portions. The substrate has a source electrode and a drain electrode, each insulated from the gate electrode and electrically connected to the source-drain area. The gate electrode includes a first gate electrode layer and a second gate electrode layer, wherein the second gate electrode layer is thicker than the first gate electrode layer.

Abstract translation: 提供了具有至少一个薄膜晶体管的薄膜晶体管阵列基板。 薄膜晶体管包括半导体层，其具有在衬底上具有第一掺杂浓度的沟道区，设置在沟道区的相对侧并具有大于第一掺杂浓度的第二掺杂浓度的源极 - 漏极区，以及基本上 从源极 - 漏极区域延伸的未掺杂区域。 衬底在半导体层上具有栅极绝缘层，栅极电极设置在栅极绝缘层上并且至少部分地与沟道区域重叠。 基板具有源电极和漏电极，各自与栅电极绝缘并且电连接到源漏区。 栅电极包括第一栅电极层和第二栅极电极层，其中第二栅电极层比第一栅电极层厚。

公开(公告)号：US20240172533A1

公开(公告)日：2024-05-23

申请号：US18499264

申请日：2023-11-01

Applicant: Samsung Display Co., Ltd.

Inventor： Jongchan Lee ,  Yongho Yang ,  Jinsuk Lee ,  Seunggyu Tae

IPC: H10K59/80 ,  H10K59/12 ,  H10K59/124

CPC classification number: H10K59/873 ,  H10K59/1201 ,  H10K59/124

Abstract: A display device may include a substrate including an opening area, a display area surrounding at least a portion of the opening area, and an intermediate area disposed between the opening area and the display area; an inorganic insulating layer disposed on the substrate and including holes disposed therein; a first organic insulating layer filling the holes and having grooves disposed in a top surface thereof; a metal layer disposed on the first organic insulating layer and comprising end portions; and a protective layer disposed on the metal layer, wherein each of the end portions of the metal layer are spaced apart from one another above at locations corresponding to the grooves in a plan view, and top surfaces and side surfaces of each of the end portions of the metal layer in a plan view are covered by the protective layer.