Abstract:
A transistor including a polysilicon layer on a base substrate and including a channel region, a first ion doping region, a second ion doping region, the channel region being between the first and second ion doping regions, an average size of the grains in the channel region being greater than that of the grains in the first and second ion doping regions, a first gate electrode insulated from and overlapping the channel region, a second gate electrode insulated from the first gate electrode and overlapping the channel region, an inter-insulating layer on the second gate electrode, a source electrode on the inter-insulating layer and connected to the first ion doping region, and a drain electrode on the inter-insulating layer and connected to the second ion doping region.
Abstract:
A method of manufacturing a thin film transistor substrate includes forming an amorphous silicon layer on a substrate, the substrate having a rectangular shape, and irradiating the amorphous silicon layer with a laser beam at a random pitch, such that the amorphous silicon layer is crystallizes into a polycrystalline silicon layer, wherein the laser beam has a major axis and a minor axis, the major axis being non-parallel with respect to sides of the substrate.
Abstract:
A thin film transistor includes a polysilicon layer on a substrate, which includes a first area between second and third areas. A polysilicon layer is formed on the substrate, and a source electrode and a drain electrode are formed on the polysilicon layer in the first and third areas. Each of the source electrode and the drain electrode includes a metal silicide layer adjacent the polysilicon layer.
Abstract:
A display device including: a first thin film transistor (TFT) including a first semiconductor layer and a first gate electrode, the first semiconductor layer including a first channel region, a first source region, and a first drain region; a third TFT including a third semiconductor layer and a third gate electrode, the third semiconductor layer including a third channel region, a third source region, and a third drain region, wherein a leakage current of the third TFT in an off-state is less than a leakage current of the first TFT in an off-state; and a pixel electrode connected to one of the first source region and the first drain region, wherein the one of the first source region and the first drain region is connected to the third TFT.
Abstract:
Provided is a thin film transistor array substrate having at least one thin film transistor. The thin film transistor includes a semiconductor layer having a channel area with a first doping concentration on a substrate, a source-drain area disposed at opposite sides of the channel area and with a second doping concentration greater than the first doping concentration, and a substantially undoped area extending from the source-drain area. The substrate has a gate insulating layer on the semiconductor layer and a gate electrode disposed on the gate insulating layer and overlapping the channel area in at least some portions. The substrate has a source electrode and a drain electrode, each insulated from the gate electrode and electrically connected to the source-drain area. The gate electrode includes a first gate electrode layer and a second gate electrode layer, wherein the second gate electrode layer is thicker than the first gate electrode layer.
Abstract:
A liquid crystal display includes a first substrate including a plurality of pixels, a second substrate facing the first substrate, and a liquid crystal layer interposed between the first substrate and the second substrate. At least one of the pixels includes a thin film transistor disposed on a first insulating substrate, an insulating layer overlapping the thin film transistor, and a pixel electrode disposed on the insulating layer. A contact hole is formed through the insulating layer to expose a first electrode of the thin film transistor, the pixel electrode is electrically connected to the first electrode through the contact hole, and the pixel electrode has a single-layer in an area where the contact hole is formed and a double-layer on the insulating layer.
Abstract:
An organic light emitting display device includes a semiconductor element, a lower electrode, a light emitting layer, an upper electrode, an anti-reflection layer, and a thin film encapsulation structure. The semiconductor element is disposed on a substrate. The lower electrode is disposed on the semiconductor element. The light emitting layer is disposed on the lower electrode. The upper electrode is disposed on the light emitting layer. The anti-reflection layer is disposed on the upper electrode. The thin film encapsulation structure is disposed on the anti-reflection layer.
Abstract:
A thin film transistor (TFT) substrate, a flat display apparatus including the TFT substrate, a method of manufacturing the TFT substrate, and a method of manufacturing the flat display apparatus, the thin film transistor (TFT) substrate including a substrate; a first gate electrode on the substrate, the first gate electrode including a first branch electrode and a second branch electrode that are spaced apart from one another; a polysilicon layer on the first gate electrode and insulated from the first gate electrode; and a second gate electrode on the polysilicon layer, the second gate electrode being insulated from the polysilicon layer and overlying the first and second branch electrodes.
Abstract:
A transistor including a polysilicon layer on a base substrate and including a channel region, a first ion doping region, a second ion doping region, the channel region being between the first and second ion doping regions, an average size of the grains in the channel region being greater than that of the grains in the first and second ion doping regions, a first gate electrode insulated from and overlapping the channel region, a second gate electrode insulated from the first gate electrode and overlapping the channel region, an inter-insulating layer on the second gate electrode, a source electrode on the inter-insulating layer and connected to the first ion doping region, and a drain electrode on the inter-insulating layer and connected to the second ion doping region.
Abstract:
A thin film transistor includes a polysilicon layer on a substrate, which includes a first area between second and third areas. A polysilicon layer is formed on the substrate, and a source electrode and a drain electrode are formed on the polysilicon layer in the first and third areas. Each of the source electrode and the drain electrode includes a metal silicide layer adjacent the polysilicon layer.