公开(公告)号：US20230213978A1

公开(公告)日：2023-07-06

申请号：US18181991

申请日：2023-03-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dahee KIM ,  Hyunggwang KANG ,  Daehyun KIM ,  Taeyeong KIM ,  Sangeun LEE

IPC: G06F1/16 ,  G06T3/40 ,  G06F3/16

CPC classification number: G06F1/1652 ,  G06F1/1624 ,  G06T3/40 ,  G06F3/165

Abstract: An electronic device operating method is provided. The electronic device includes a housing, a flexible display including a sliding plate that can slide-out from the housing, and a bendable section that can be withdrawn from the inner space of the housing overlapped and coupled to the sliding plate, a speaker, a sensor for detecting a first state in which a portion of the bendable section is inserted into the inner space of the housing through sliding-in of the sliding plate, or a second state in which a portion of the bendable section is withdrawn to the outer space of the housing through sliding-out of the sliding plate, and a processor operably connected to the at least one sensor.

公开(公告)号：US20240071895A1

公开(公告)日：2024-02-29

申请号：US18353279

申请日：2023-07-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seoeun KYUNG ,  Byung Ho KIM ,  Youngbae KIM ,  Hongwon KIM ,  Seokwon LEE ,  Jae-Ean LEE ,  Dahee KIM

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/538 ,  H01L25/10 ,  H01L25/18

CPC classification number: H01L23/49838 ,  H01L23/5386 ,  H01L24/16 ,  H01L25/105 ,  H01L25/18 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/5385 ,  H01L24/48 ,  H01L2224/16227 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48227 ,  H01L2225/1035 ,  H01L2225/1058

Abstract: A semiconductor package may include a lower redistribution layer including a lower wiring and a lower via, an embedded region on the lower redistribution layer, a core layer on the lower redistribution layer and including a core via, and an under bump structure including an under bump pad on a lower surface of the lower redistribution layer and an under bump via connecting the lower wiring and the under bump pad, the under bump pad may overlap the under bump via, the lower via, and the core via in a plan view, and the under bump via may be spaced apart from at least one of the lower via and the core via in the plan view.

公开(公告)号：US20230075430A1

公开(公告)日：2023-03-09

申请号：US17988391

申请日：2022-11-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Moonsun KIM ,  Hyoungtak CHO ,  Dahee KIM ,  Sukdong KIM ,  Soohyun SEO ,  Wonkyu SUNG ,  Yeonggyu YOON ,  Changhan LEE ,  Hyunju HONG

IPC: G09G3/00

Abstract: An electronic device is provided. The electronic device includes a display including a main area, a first sub area extending in a first direction, and a second sub area extending in a second direction perpendicular to the first direction, a display driver integrated circuit (IC) for scanning a scan signal and a data voltage to the display, and a processor operatively connected to the display and the display driver IC, wherein the processor is configured to control the display driver IC to supply the scan signal to at least some areas among the main area, the first sub area, and the second sub area of the display, to control the display driver IC to partially scan a data voltage to an area in which a screen is to be displayed among the main area, the first sub area, and the second sub area.

公开(公告)号：US20230074701A1

公开(公告)日：2023-03-09

申请号：US17983769

申请日：2022-11-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Raetae KIM ,  Gyeongtae PARK ,  Dahee KIM ,  Songyi LEE ,  Jonghwa LEE ,  Jihea PARK

IPC: G09G3/20 ,  G09G3/00

Abstract: An electronic device and its screen control method are disclosed. The electronic device may include a flexible display configured to change a size of a display area and at least one processor. The at least one processor may, based on a first screen being displayed in the display area of a first size, receive an input for changing the display area into a second size The at least one processor may, based on the display area being changed to the second size according to the received input, control the display to display a second screen which changes the first screen in response to the second size in the display area changed into the second size. The second screen may include, among a plurality of elements in content, a first element corresponding to an element in the first screen and a second element of the content.

公开(公告)号：US20250096201A1

公开(公告)日：2025-03-20

申请号：US18599390

申请日：2024-03-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gyujin CHOI ,  Dahee KIM ,  Hwan Pil PARK ,  Taehoon LEE ,  Younjeong CHOE

IPC: H01L25/065 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L25/16

Abstract: The present disclosure relates to a semiconductor package which includes a wiring structure including insulating layers, wiring layers, and vias, a chip stack structure including a plurality of semiconductor chips and being oblique on the wiring structure such that the plurality of semiconductor chips are inclined with respect to the wiring structure, and a sealing material encapsulating the chip stack structure, wherein each of the plurality of semiconductor chips includes connection pads on one surface of the semiconductor chip, and the plurality of semiconductor chips are being offset with each other such that the connection pads are exposed, and each of the connection pads of each of the plurality of semiconductor chips is in contact with one of the vias and connected to the wiring layers.

公开(公告)号：US20240304557A1

公开(公告)日：2024-09-12

申请号：US18479820

申请日：2023-10-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gyujin CHOI ,  Dahee KIM ,  Jaeean LEE ,  Taehoon LEE

IPC: H01L23/538 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/552 ,  H01L25/065

CPC classification number: H01L23/5383 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/5385 ,  H01L23/5386 ,  H01L23/552 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0652 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/13 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/73204

Abstract: A semiconductor package includes a first redistribution structure in which at least one first redistribution layer and at least one first insulating layer are alternately layered; a first semiconductor chip disposed on an upper surface of the first redistribution structure; a second semiconductor chip having a lower portion surrounded by the first redistribution structure; a first encapsulant disposed on the upper surface of the first redistribution structure to encapsulate the first semiconductor chip; a second encapsulant encapsulating the second semiconductor chip and having a lower portion surrounded by the first redistribution structure; and a conductive support layer supporting the second semiconductor chip and the second encapsulant on an upper surface of the second semiconductor chip.

公开(公告)号：US20230156116A1

公开(公告)日：2023-05-18

申请号：US18153673

申请日：2023-01-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yeonggyu YOON ,  Dahee KIM ,  Moonsun KIM ,  Sukdong KIM ,  Soohyun SEO ,  Wonkyu SUNG ,  Changhan LEE ,  Hyoungtak CHO ,  Hyunju HONG

IPC: H04M1/72454 ,  H04M1/02 ,  G06F1/16

CPC classification number: H04M1/72454 ,  H04M1/0235 ,  G06F1/1624 ,  G06F1/1607 ,  H04M2201/38 ,  H04M2201/42 ,  G06F2200/1632

Abstract: An electronic device is provided. The electronic device includes a first housing, a second housing slidably coupled to the first housing, a display of which at least a part is fixed to the second housing so that an information display region, which is a part of the electronic device visible on the outside, increases or decreases according to the sliding of the second housing, and a support member including a bendable structure, supporting at least a part of the display, and moving according to the sliding of the second housing, wherein, the information display region increases if the second housing slides in a first direction at a reference position at which the end of the second housing and the end of the first housing are substantially aligned, and the information display region decreases if the second housing slides in a second direction opposite to the first direction at the reference position.

公开(公告)号：US20220406697A1

公开(公告)日：2022-12-22

申请号：US17695110

申请日：2022-03-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dahee KIM ,  Gookmi SONG

IPC: H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L25/10

Abstract: A semiconductor package includes a semiconductor chip including a connecting pad, a mold layer covering the semiconductor chip, a lower redistribution layer on the semiconductor chip and the mold layer, and a connecting terminal on the lower redistribution layer. The lower redistribution layer includes a first lower insulating layer, a first conformal redistribution pattern extending through the first lower insulating layer, a second lower insulating layer on the first lower insulating layer and the first conformal redistribution pattern, and a first filled redistribution pattern disposed on the first conformal redistribution pattern and extending through the second lower insulating layer. A side surface of the first filled redistribution pattern is spaced apart from an inner side surface of the first conformal redistribution pattern. The second lower insulating layer is between the inner side surface of the first conformal redistribution pattern and the side surface of the first filled redistribution pattern.

公开(公告)号：US20250046769A1

公开(公告)日：2025-02-06

申请号：US18665893

申请日：2024-05-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jooyoung CHOI ,  Dahee KIM ,  Jeongseok KIM ,  Gyujin CHOI ,  Jaehoon CHOI

IPC: H01L25/10 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L25/065 ,  H01L25/16

Abstract: A semiconductor package may include a package redistribution layer including a plurality of package redistribution patterns and a package redistribution insulating layer surrounding the plurality of package redistribution patterns, a plurality of electronic components apart from each other in a horizontal direction on the package redistribution layer and including at least one sub package, a package molding layer covering a top surface of the package redistribution layer and surrounding the plurality of electronic components, and a plurality of package connection terminals attached to a bottom surface of the package redistribution layer in a fan-out manner. The at least one sub package may include a package substrate, a semiconductor chip attached to the package substrate, and a sub molding layer on the package substrate.

公开(公告)号：US20240421058A1

公开(公告)日：2024-12-19

申请号：US18644867

申请日：2024-04-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minkyu KIM ,  Dahee KIM ,  Khaile KIM ,  Kyuil HWANG

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00 ,  H01L23/538

Abstract: A semiconductor package may include a package structure on a redistribution structure. The redistribution structure may include a wiring structure and an insulating structure covering the wiring structure. The package structure may include a semiconductor chip connected to the wiring structure. The insulating structure of the redistribution structure may include a plurality of first insulating layers and a second insulating layer between the plurality of first insulating layers. The plurality of first insulating layers may include at least one of a first conductive line pattern and a first conductive via pattern. The second insulating layer may include a second conductive line pattern overlapping the first conductive line pattern in a vertical direction.