Semiconductor devices
    1.
    发明授权

    公开(公告)号:US11785767B2

    公开(公告)日:2023-10-10

    申请号:US17159727

    申请日:2021-01-27

    CPC classification number: H10B41/27 H10B41/10 H10B43/10 H10B43/27

    Abstract: A semiconductor device includes a substrate having a first region and a second region, insulating patterns in the substrate in the second region that define active patterns of the substrate, gate electrodes spaced apart from each other and stacked on an upper surface of the substrate and extending in a first direction, first separation regions extending in the first direction and in contact with the active patterns, second separation regions extending between the first separation regions in the first direction, and channel structures penetrating through the gate electrodes in the first region. At least one of the second separation regions is in contact with the substrate below the insulating patterns.

    3D semiconductor memory device
    3.
    发明授权

    公开(公告)号:US11744078B2

    公开(公告)日:2023-08-29

    申请号:US17085715

    申请日:2020-10-30

    CPC classification number: H10B43/50 H10B43/10 H10B43/27

    Abstract: A semiconductor device includes a substrate having a first region and a second region, gate electrodes stacked and spaced apart from each other in a first direction, perpendicular to an upper surface of the substrate in the first region and extending in different lengths along a second direction, perpendicular to the first direction in the second region, first separation regions penetrating the gate electrodes in the first and second regions, extending in the second direction, and spaced apart from each other in a third direction, perpendicular to the first and second directions, second separation regions penetrating the gate electrodes in the second region and spaced apart from each other in the second direction between the separation regions, and a first vertical structure penetrating the gate electrodes in the second region and closest to the first region, wherein a width of the second separation regions in the third direction is greater than a width of the first vertical structure, a first end point of the second separation regions adjacent to the first region is spaced apart from a central axis of the first dummy structure in the second direction, away from the first region.

    SEMICONDUCTOR DEVICES
    4.
    发明申请

    公开(公告)号:US20210391346A1

    公开(公告)日:2021-12-16

    申请号:US17159727

    申请日:2021-01-27

    Abstract: A semiconductor device includes a substrate having a first region and a second region, insulating patterns in the substrate in the second region that define active patterns of the substrate, gate electrodes spaced apart from each other and stacked on an upper surface of the substrate and extending in a first direction, first separation regions extending in the first direction and in contact with the active patterns, second separation regions extending between the first separation regions in the first direction, and channel structures penetrating through the gate electrodes in the first region. At least one of the second separation regions is in contact with the substrate below the insulating patterns.

    Semiconductor devices
    5.
    发明授权

    公开(公告)号:US12114497B2

    公开(公告)日:2024-10-08

    申请号:US18464668

    申请日:2023-09-11

    CPC classification number: H10B41/27 H10B41/10 H10B43/10 H10B43/27

    Abstract: A semiconductor device includes a substrate having a first region and a second region, insulating patterns in the substrate in the second region that define active patterns of the substrate, gate electrodes spaced apart from each other and stacked on an upper surface of the substrate and extending in a first direction, first separation regions extending in the first direction and in contact with the active patterns, second separation regions extending between the first separation regions in the first direction, and channel structures penetrating through the gate electrodes in the first region. At least one of the second separation regions is in contact with the substrate below the insulating patterns.

    3D semiconductor memory device
    6.
    发明授权

    公开(公告)号:US12101937B2

    公开(公告)日:2024-09-24

    申请号:US18358993

    申请日:2023-07-26

    CPC classification number: H10B43/50 H10B43/10 H10B43/27

    Abstract: A semiconductor device includes a substrate having a first region and a second region, gate electrodes stacked and spaced apart from each other in a first direction, perpendicular to an upper surface of the substrate in the first region and extending in different lengths along a second direction, perpendicular to the first direction in the second region, first separation regions penetrating the gate electrodes in the first and second regions, extending in the second direction, and spaced apart from each other in a third direction, perpendicular to the first and second directions, second separation regions penetrating the gate electrodes in the second region and spaced apart from each other in the second direction between the separation regions, and a first vertical structure penetrating the gate electrodes in the second region and closest to the first region, wherein a width of the second separation regions in the third direction is greater than a width of the first vertical structure, a first end point of the second separation regions adjacent to the first region is spaced apart from a central axis of the first dummy structure in the second direction, away from the first region.

    SEMICONDUCTOR DEVICES
    7.
    发明公开

    公开(公告)号:US20230422497A1

    公开(公告)日:2023-12-28

    申请号:US18464668

    申请日:2023-09-11

    CPC classification number: H10B41/27 H10B41/10 H10B43/10 H10B43/27

    Abstract: A semiconductor device includes a substrate having a first region and a second region, insulating patterns in the substrate in the second region that define active patterns of the substrate, gate electrodes spaced apart from each other and stacked on an upper surface of the substrate and extending in a first direction, first separation regions extending in the first direction and in contact with the active patterns, second separation regions extending between the first separation regions in the first direction, and channel structures penetrating through the gate electrodes in the first region. At least one of the second separation regions is in contact with the substrate below the insulating patterns.

Patent Agency Ranking