Abstract:
A semiconductor device and a method of fabricating a semiconductor device, the device including a substrate including an element isolation film and an active region defined by the element isolation film; a word line crossing the active region in a first direction; and a bit line structure on the substrate and connected to the active region, the bit line structure extending in a second direction crossing the first direction, wherein the bit line structure includes a first cell interconnection film including an amorphous material or ruthenium, a second cell interconnection film on and extending along the first cell interconnection film and including ruthenium, and a cell capping film on and extending along the second cell interconnection film.
Abstract:
A method and apparatus for processing audio data are provided. When an encoded audio bitstream sampled at a sampling frequency is received, a resampling ratio for processing the encoded audio bitstream is computed. If the the resampling ratio is within the resampling threshold range, then the encoded audio bitstream is processed in frequency domain and a desired number of audio samples per frame are outputted according to the resampling ratio. The encoded audio bitstream is processed in frequency domain using sample rate converter integrated into a filter bank of an audio decoder. If the resampling ratio is outside the resampling threshold range, then the encoded audio bitstream is processed in time domain and a desired number of audio samples per frame are outputted according to the resampling ratio.
Abstract:
A memory module includes a first printed circuit board (PCB) which includes a first surface, a second surface, first taps formed on the first surface, and second taps formed on the second surface, a first buffer attached to the first PCB, and first memory devices attached to the first PCB, in which the first buffer is configured to transmit signals input through the first taps and the second taps to the first memory devices, and signals re-driven by the first buffer among the signals are transmitted to a second module through the second taps.
Abstract:
A refrigerator includes a driving coupler to transmit a driving force and a connecting member to transmit the driving force of the driving coupler to a transfer member. The connecting member is rotated when interference with the driving coupler occurs in a process of connecting with the driving coupler and idles within a predetermined angle range regardless of the transfer member. With this constitution, even when ice cubes are loaded by the transfer member, the connecting member may be smoothly rotated. Thus, the driving coupler and the connecting member may be smoothly connected without an impact.
Abstract:
A structure of an ice making compartment of a refrigerator capable of enlarging the volume of a storage compartment by reducing a width of an ice making compartment, and capable of easily discharging the whole ice separately from pieces of ice, the refrigerator including an opening/closing member configured to open and close a portion of a discharge hole and having a cover portion to prevent the whole ice from being discharged in a state that the portion of the discharge hole is closed, the refrigerator including an opening/closing member integrally formed with a fixed blade configured to crush ice in cooperation with a rotary blade.
Abstract:
An arithmetic processing apparatus and method for high speed processing of an application are provided. The arithmetic processing apparatus may include a program control unit to store operation processing information necessary for application operation in a communication channel by executing an application code, and an operation processing unit to process the application operation using the operation processing information stored in the communication channel.
Abstract:
The present disclosure relates to power receiving devices and methods. An example power receiving device comprises an antenna cell array configured to receive a radio frequency (RF) signal from a transmission device, where the antenna cell array includes a first antenna cell and a second antenna cell, a first rectifier connected to the first antenna cell and having first maximum rectification efficiency when an input signal of the first rectifier has a first power value, a second rectifier connected to the second antenna cell and having second maximum rectification efficiency when an input signal of the second rectifier has a second power value different from the first power value, a first voltage converter configured to perform a first conversion of an output of the first rectifier, and a second voltage converter configured to perform a second conversion of an output of the second rectifier.
Abstract:
A refrigerator includes a body, a storage compartment provided in the body, a door to open and close the storage compartment, an icemaker provided to one side of the storage compartment, an ice bucket provided under the icemaker, and a crusher provided to the rear surface of the door and having an inlet disposed under the outlet of the ice bucket when the door is closed. The crusher may be provided separately from the ice bucket and may independently mounted and detached to and from the rear surface of the door. The ice bucket may have a slimmer design. The space utilization and usability of the storage compartments and the rear surface of the doors may be enhanced.
Abstract:
A reconfigurable processor and an operation method of the reconfigurable processor may include: a status register configured to store a status value used to determine at least one execution mode in a processor; a parallel processing scheduler configured to schedule at least one of a very long instruction word (VLIW) logic and a coarse grained architecture (CGA) logic to be used based on the stored status value; a VLIW register configured to store processed data according to the VLIW logic; and a CGA register configured to store processed data according to the CGA logic.
Abstract:
An arithmetic processing apparatus and method for high speed processing of an application are provided. The arithmetic processing apparatus may include a program control unit to store operation processing information necessary for application operation in a communication channel by executing an application code, and an operation processing unit to process the application operation using the operation processing information stored in the communication channel.