公开(公告)号：US12237000B2

公开(公告)日：2025-02-25

申请号：US18045846

申请日：2022-10-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changyoung Lee ,  Kyu-Chang Kang ,  Donghak Shin ,  Hyun-Chul Yoon

IPC: G11C7/06 ,  G11C11/4091 ,  G11C11/4094 ,  G11C11/4097 ,  G11C7/10

Abstract: In a sense amplifier circuit, a first transistor is electrically connected between a first bitline and a first node, a first inverter includes a first input terminal and a first output terminal connected to the first node, and a second inverter includes a second input terminal connected to a second node and a second output terminal. A second transistor is electrically connected between the first output terminal and the second node, and a third transistor is electrically connected between the second output terminal and the first node. A precharge circuit transfers a first voltage to the first and second nodes during a first period, and transfers a second voltage higher than the first voltage to the first and second nodes during a second period.

公开(公告)号：US12236998B2

公开(公告)日：2025-02-25

申请号：US18143127

申请日：2023-05-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seongjin Cho ,  Kyuchang Kang ,  Keonwoo Park ,  Donghak Shin

IPC: G11C11/40 ,  G11C11/408 ,  G11C11/4091 ,  H01L25/065 ,  H10B12/00 ,  H10B80/00

Abstract: A semiconductor device includes a memory cell array that includes a plurality of memory cells electrically connected to a plurality of word lines and a plurality of bit lines, a word line driving circuit that includes a plurality of sub-word line decoders electrically connected to the plurality of word lines, and a control logic configured to determine a selected word line and unselected word lines among the plurality of word lines, and configured to control the word line driving circuit such that at least one of the unselected word lines that is adjacent to the selected word line is floated during at least a portion of a period in which a voltage of the selected word line returns to an initial level.

公开(公告)号：US20240087640A1

公开(公告)日：2024-03-14

申请号：US18143127

申请日：2023-05-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seongjin Cho ,  Kyuchang Kang ,  Keonwoo Park ,  Donghak Shin

IPC: G11C11/408 ,  G11C11/4091 ,  H01L25/065 ,  H10B12/00 ,  H10B80/00

CPC classification number: G11C11/4085 ,  G11C11/4087 ,  G11C11/4091 ,  H01L25/0655 ,  H10B12/482 ,  H10B12/488 ,  H10B12/50 ,  H10B80/00

Abstract: A semiconductor device includes a memory cell array that includes a plurality of memory cells electrically connected to a plurality of word lines and a plurality of bit lines, a word line driving circuit that includes a plurality of sub-word line decoders electrically connected to the plurality of word lines, and a control logic configured to determine a selected word line and unselected word lines among the plurality of word lines, and configured to control the word line driving circuit such that at least one of the unselected word lines that is adjacent to the selected word line is floated during at least a portion of a period in which a voltage of the selected word line returns to an initial level.

公开(公告)号：US20230420034A1

公开(公告)日：2023-12-28

申请号：US18045846

申请日：2022-10-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changyoung Lee ,  Kyu-Chang Kang ,  Donghak Shin ,  Hyun-Chul Yoon

IPC: G11C11/4091 ,  G11C11/4094 ,  G11C11/4097

CPC classification number: G11C11/4091 ,  G11C11/4094 ,  G11C11/4097

Abstract: In a sense amplifier circuit, a first transistor is electrically connected between a first bitline and a first node, a first inverter includes a first input terminal and a first output terminal connected to the first node, and a second inverter includes a second input terminal connected to a second node and a second output terminal. A second transistor is electrically connected between the first output terminal and the second node, and a third transistor is electrically connected between the second output terminal and the first node. A precharge circuit transfers a first voltage to the first and second nodes during a first period, and transfers a second voltage higher than the first voltage to the first and second nodes during a second period.