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公开(公告)号：US10915257B2
公开(公告)日：2021-02-09
申请号：US15806640
申请日：2017-11-08
Applicant: Samsung Electronics Co., Ltd.
Inventor： Myung Kyoon Yim , Ho Yeon Jeon , Sang Woo Han , Taek Kyun Shin , Woo Sung Lee , Seung Hyun Choi
IPC: G06F1/3206 , G06F3/06 , G06F1/3296 , G06F15/78 , G06F1/3234
Abstract: A semiconductor device and a semiconductor system are provided. A semiconductor device includes a monitoring circuit receiving a first operating voltage and a second operating voltage, which is different from the first operating voltage, from a Power Management Integrated Circuit (PMIC) and monitoring a duration of use of a System-on-Chip (SoC) at each of the first and second operating voltages; a processing circuit calculating a normalized value based on predetermined weight information from the duration of use of the SoC at each of the first and second operating voltages; and a voltage circuit determining whether to increase an operating voltage of the SoC by comparing the normalized value with a predetermined value.
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公开(公告)号：US11314278B2
公开(公告)日：2022-04-26
申请号：US17154373
申请日：2021-01-21
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Ho Yeon Jeon , Ah Chan Kim , Jae Gon Lee
IPC: G06F1/10 , G06F1/32 , G06F1/3237
Abstract: A semiconductor device includes a first control circuit controlling a first child clock source to receive a clock signal from a parent clock source, a first channel management (CM) circuit transmitting a first clock request to the first control circuit in response to a second clock request received from a first IP block, a second control circuit controlling a second child clock source to receive the clock signal from the parent clock source, a second CM circuit transmitting a third clock request to the second control circuit in response to a fourth clock request received from a second IP block, and a power management unit transmitting a power control command to the first CM circuit and the second CM circuit to control a power state of the first IP block and the second IP block. The first CM circuit and the second exchange signals to maintain a master-slave relationship.
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公开(公告)号：US10928849B2
公开(公告)日：2021-02-23
申请号：US16393106
申请日：2019-04-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Ho Yeon Jeon , Ah Chan Kim , Jae Gon Lee
IPC: G06F1/10 , G06F1/32 , G06F1/3237
Abstract: A semiconductor device includes a first control circuit controlling a first child clock source to receive a clock signal from a parent clock source, a first channel management (CM) circuit transmitting a first clock request to the first control circuit in response to a second clock request received from a first IP block, a second control circuit controlling a second child clock source to receive the clock signal from the parent clock source, a second CM circuit transmitting a third clock request to the second control circuit in response to a fourth clock request received from a second IP block, and a power management unit transmitting a power control command to the first CM circuit and the second CM circuit to control a power state of the first IP block and the second IP block. The first CM circuit and the second exchange signals to maintain a master-slave relationship.
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公开(公告)号：US20180225053A1
公开(公告)日：2018-08-09
申请号：US15806640
申请日：2017-11-08
Applicant: Samsung Electronics Co., Ltd.
Inventor： Myung Kyoon Yim , Ho Yeon Jeon , Sang Woo Han , Taek Kyun Shin , Woo Sung Lee , Seung Hyun Choi
CPC classification number: G06F3/0625 , G06F1/3206 , G06F1/3243 , G06F1/3296 , G06F3/065 , G06F3/0679 , G06F15/7821
Abstract: A semiconductor device and a semiconductor system are provided. A semiconductor device includes a monitoring circuit receiving a first operating voltage and a second operating voltage, which is different from the first operating voltage, from a Power Management Integrated Circuit (PMIC) and monitoring a duration of use of a System-on-Chip (SoC) at each of the first and second operating voltages; a processing circuit calculating a normalized value based on predetermined weight information from the duration of use of the SoC at each of the first and second operating voltages; and a voltage circuit determining whether to increase an operating voltage of the SoC by comparing the normalized value with a predetermined value.
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Patent Agency Ranking
公开(公告)号：US11747853B2
公开(公告)日：2023-09-05
申请号：US17713656
申请日：2022-04-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Ho Yeon Jeon , Ah Chan Kim , Jae Gon Lee
IPC: G06F1/10 , G06F1/32 , G06F1/3237
CPC classification number: G06F1/10 , G06F1/3237
Abstract: A semiconductor device includes a first control circuit controlling a first child clock source to receive a clock signal from a parent clock source, a first channel management (CM) circuit transmitting a first clock request to the first control circuit in response to a second clock request received from a first IP block, a second control circuit controlling a second child clock source to receive the clock signal from the parent clock source, a second CM circuit transmitting a third clock request to the second control circuit in response to a fourth clock request received from a second IP block, and a power management unit transmitting a power control command to the first CM circuit and the second CM circuit to control a power state of the first IP block and the second IP block. The first CM circuit and the second exchange signals to maintain a master-slave relationship.
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公开(公告)号：US10727733B2
公开(公告)日：2020-07-28
申请号：US15651448
申请日：2017-07-17
Applicant: Samsung Electronics Co., Ltd.
Inventor： Ho Yeon Jeon , Hwa Yeal Yu , Seung Gyu Lee , Eun Suk Kim
Abstract: A semiconductor device includes an inductor selectively connected to a power supply voltage and configured to store and release energy; a first transistor connected between the power supply voltage and the inductor and configured to provide the power supply voltage to the inductor; a second transistor connected to the first transistor in series, connected between the inductor and a ground voltage, and configured to provide the ground voltage to the inductor; a modulator configured to provide a modulation signal to a control circuit configured to control the first and second transistors by performing pulse width modulation (PWM); a current sensor configured to sense an amount of current passing through the first transistor and generate a first output signal based on the sensed amount of current; and a first overcurrent protection output generator configured to generate a second output signal based on the first output signal and a first reference signal.
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公开(公告)号：US10303203B2
公开(公告)日：2019-05-28
申请号：US15414819
申请日：2017-01-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Ho Yeon Jeon , Ah Chan Kim , Jae Gon Lee
IPC: G06F1/10 , G06F1/32 , G06F1/3237
Abstract: A semiconductor device includes a first control circuit controlling a first child clock source to receive a clock signal from a parent clock source, a first channel management (CM) circuit transmitting a first clock request to the first control circuit in response to a second clock request received from a first IP block, a second control circuit controlling a second child clock source to receive the clock signal from the parent clock source, a second CM circuit transmitting a third clock request to the second control circuit in response to a fourth clock request received from a second IP block, and a power management unit transmitting a power control command to the first CM circuit and the second CM circuit to control a power state of the first IP block and the second IP block. The first CM circuit and the second exchange signals to maintain a master-slave relationship.
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公开(公告)号：US09904343B2
公开(公告)日：2018-02-27
申请号：US14557507
申请日：2014-12-02
Applicant: Samsung Electronics Co., Ltd.
Inventor： Ho Yeon Jeon
CPC classification number: G06F1/3203 , G01R21/06 , G06F1/206 , Y02D10/16
Abstract: Methods of operating a system on chip including a first power domain and a second power domain are provided. The method includes measuring at least one of a voltage and a current, which are applied to the first power domain in analog mode to obtain a measurement result; calculating a first power consumed in the first power domain based on the measurement result; calculating a second power consumed in the second power domain in digital mode based on an activity of the second power domain; and controlling a total power of the system on chip based on the first power and the second power. At least one of the measuring, calculating a first power, calculating a second power and controlling are performed by at least one processor.
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9.发明申请公开(公告)号：US20150153393A1
公开(公告)日：2015-06-04
申请号：US14557507
申请日：2014-12-02
Applicant: Samsung Electronics Co., Ltd.
Inventor： Ho Yeon Jeon
IPC: G01R21/00
CPC classification number: G06F1/3203 , G01R21/06 , G06F1/206 , Y02D10/16
Abstract: Methods of operating a system on chip including a first power domain and a second power domain are provided. The method includes measuring at least one of a voltage and a current, which are applied to the first power domain in analog mode to obtain a measurement result; calculating a first power consumed in the first power domain based on the measurement result; calculating a second power consumed in the second power domain in digital mode based on an activity of the second power domain; and controlling a total power of the system on chip based on the first power and the second power. At least one of the measuring, calculating a first power, calculating a second power and controlling are performed by at least one processor.
Abstract translation: 提供了操作包括第一功率域和第二功率域的片上系统的方法。 该方法包括测量以模拟模式施加到第一功率域的电压和电流中的至少一个以获得测量结果; 基于测量结果计算第一功率域中消耗的第一功率; 基于第二功率域的活动，以数字模式计算在第二功率域中消耗的第二功率; 以及基于第一功率和第二功率来控制片上系统的总功率。 至少一个处理器执行测量，计算第一功率，计算第二功率和控制中的至少一个。
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