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公开(公告)号：US20240323845A1
公开(公告)日：2024-09-26
申请号：US18734324
申请日：2024-06-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Taek Kyun Shin , Jun Ho Seo , Jung Hun Heo
IPC: H04W52/02
CPC classification number: H04W52/0229 , H04W52/028 , Y02D30/70
Abstract: An application processor and a system on chip (SoC) that incorporates the application processor are provided. The application processor includes a first core configured to process first data per unit time, a second core configured to process second data larger than the first data per unit time, and a lookup table configured to determine whether to activate the first core or the second core based on at least one of an analysis result of a message signal received by a communications processor, a sensing signal supplied to the application processor and a power level supplied to the communications processor.
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公开(公告)号：US11152922B2
公开(公告)日：2021-10-19
申请号：US16792343
申请日：2020-02-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： San Ha Kim , Taek Kyun Shin , Min Su Kim
IPC: H03K3/037 , G01R31/3183 , H03K19/20
Abstract: A semiconductor device includes a scan input circuit, a master latch, a slave latch, a first inverter, and a scan output circuit. The scan input circuit is configured to receive a scan input signal, a first data signal, and a scan enable signal and select any one of the first data signal and the scan input signal in response to the scan enable signal to output a first select signal. The master latch is configured to latch the first select signal and output a first output signal. The slave latch is configured to latch the first output signal and output a second output signal. The first inverter is configured to invert the second output signal. The scan output circuit is configured to receive a signal output from the slave latch and an external signal and output a first scan output signal.
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公开(公告)号：US10915257B2
公开(公告)日：2021-02-09
申请号：US15806640
申请日：2017-11-08
Applicant: Samsung Electronics Co., Ltd.
Inventor： Myung Kyoon Yim , Ho Yeon Jeon , Sang Woo Han , Taek Kyun Shin , Woo Sung Lee , Seung Hyun Choi
IPC: G06F1/3206 , G06F3/06 , G06F1/3296 , G06F15/78 , G06F1/3234
Abstract: A semiconductor device and a semiconductor system are provided. A semiconductor device includes a monitoring circuit receiving a first operating voltage and a second operating voltage, which is different from the first operating voltage, from a Power Management Integrated Circuit (PMIC) and monitoring a duration of use of a System-on-Chip (SoC) at each of the first and second operating voltages; a processing circuit calculating a normalized value based on predetermined weight information from the duration of use of the SoC at each of the first and second operating voltages; and a voltage circuit determining whether to increase an operating voltage of the SoC by comparing the normalized value with a predetermined value.
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公开(公告)号：US20180225053A1
公开(公告)日：2018-08-09
申请号：US15806640
申请日：2017-11-08
Applicant: Samsung Electronics Co., Ltd.
Inventor： Myung Kyoon Yim , Ho Yeon Jeon , Sang Woo Han , Taek Kyun Shin , Woo Sung Lee , Seung Hyun Choi
CPC classification number: G06F3/0625 , G06F1/3206 , G06F1/3243 , G06F1/3296 , G06F3/065 , G06F3/0679 , G06F15/7821
Abstract: A semiconductor device and a semiconductor system are provided. A semiconductor device includes a monitoring circuit receiving a first operating voltage and a second operating voltage, which is different from the first operating voltage, from a Power Management Integrated Circuit (PMIC) and monitoring a duration of use of a System-on-Chip (SoC) at each of the first and second operating voltages; a processing circuit calculating a normalized value based on predetermined weight information from the duration of use of the SoC at each of the first and second operating voltages; and a voltage circuit determining whether to increase an operating voltage of the SoC by comparing the normalized value with a predetermined value.
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公开(公告)号：US11431326B2
公开(公告)日：2022-08-30
申请号：US17449079
申请日：2021-09-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： San Ha Kim , Taek Kyun Shin , Min Su Kim
IPC: H03K3/037 , G01R31/3183 , H03K19/20
Abstract: A semiconductor device includes a scan input circuit, a master latch, a slave latch, a first inverter, and a scan output circuit. The scan input circuit is configured to receive a scan input signal, a first data signal, and a scan enable signal and select any one of the first data signal and the scan input signal in response to the scan enable signal to output a first select signal. The master latch is configured to latch the first select signal and output a first output signal. The slave latch is configured to latch the first output signal and output a second output signal. The first inverter is configured to invert the second output signal. The scan output circuit is configured to receive a signal output from the slave latch and an external signal and output a first scan output signal.
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Patent Agency Ranking
公开(公告)号：US10075153B2
公开(公告)日：2018-09-11
申请号：US15390813
申请日：2016-12-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Taek Kyun Shin , Jin Pyo Park , Soong Hyun Shin , Jung Hun Heo
CPC classification number: H03K5/135 , H03K5/14 , H03K2005/00078 , H04L7/0331
Abstract: A low-power synchronizer circuit, a data processing circuit that incorporates the synchronizer circuit, and a synchronization method are provided. The synchronizer circuit includes a delay circuit for receiving and delaying an asynchronous input signal, a first flip-flop having an input terminal connected to an output terminal of the delay circuit, a clock terminal for receiving the asynchronous input signal, and a reset terminal for receiving the asynchronous input signal, a synchronizer connected to an output terminal of the first flip-flop, and a clock-gating circuit for receiving a clock signal and determining whether to supply the clock signal to the synchronizer in response to one of a first output value of the delay circuit and a second output value of the first flip-flop and a third output value of the synchronizer.
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7.发明授权公开(公告)号：US09207779B2
公开(公告)日：2015-12-08
申请号：US14030099
申请日：2013-09-18
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Myoung Seok Kong , Hyun Woo Park , Taek Kyun Shin
CPC classification number: G06F3/0304 , G06F3/011 , G06F3/0325
Abstract: A contactless user-interface (UI) motion recognizing device and method of controlling the same are provided. The method includes: obtaining a left-eye image and a right-eye image; determining an object position of an object in the obtained left-eye image and the obtained right-eye image; determining an object brightness of the object; determining depth information of the object using the determined object brightness; determining a three-dimensional (3D) object position of the object using the determined object position and the determined depth information; determining an object moving velocity based on the determined 3D object position and a previous 3D object position; and determining a UI pattern based on the determined 3D object position and the determined object moving velocity, and executing an operation according to the determined UI pattern.
Abstract translation: 提供了一种非接触式用户界面（UI）运动识别装置及其控制方法。 该方法包括：获得左眼图像和右眼图像; 确定所获得的左眼图像和所获得的右眼图像中的对象的对象位置; 确定物体的物体亮度; 使用确定的对象亮度确定对象的深度信息; 使用所确定的对象位置和确定的深度信息来确定对象的三维（3D）对象位置; 基于所确定的3D对象位置和先前的3D对象位置来确定对象移动速度; 以及基于所确定的3D对象位置和所确定的对象移动速度来确定UI模式，以及根据所确定的UI模式执行操作。
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公开(公告)号：US12047879B2
公开(公告)日：2024-07-23
申请号：US17945592
申请日：2022-09-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Taek Kyun Shin , Jun Ho Seo , Jung Hun Heo
CPC classification number: H04W52/0229 , H04W52/028 , Y02D30/70
Abstract: An application processor and a system on chip (SoC) that incorporates the application processor are provided. The application processor includes a first core configured to process first data per unit time, a second core configured to process second data larger than the first data per unit time, and a lookup table configured to determine whether to activate the first core or the second core based on at least one of an analysis result of a message signal received by a communications processor, a sensing signal supplied to the application processor and a power level supplied to the communications processor.
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公开(公告)号：US11463957B2
公开(公告)日：2022-10-04
申请号：US17148631
申请日：2021-01-14
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Taek Kyun Shin , Jun Ho Seo , Jung Hun Heo
IPC: H04W52/02
Abstract: An application processor and a system on chip (SoC) that incorporates the application processor are provided. The application processor includes a first core configured to process first data per unit time, a second core configured to process second data larger than the first data per unit time, and a lookup table configured to determine whether to activate the first core or the second core based on at least one of an analysis result of a message signal received by a communications processor, a sensing signal supplied to the application processor and a power level supplied to the communications processor.
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公开(公告)号：US11244936B2
公开(公告)日：2022-02-08
申请号：US16439409
申请日：2019-06-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Yun Hyeok Im , Hee Seok Lee , Taek Kyun Shin , Cha Jea Jo
IPC: H01L25/10 , H01L23/538 , H01L23/498 , H01L23/13 , H01L21/56 , H01L21/48 , H01L21/683 , H01L23/31 , H01L29/06 , H01L23/367
Abstract: A semiconductor device package and a semiconductor apparatus are provided. The semiconductor device includes a first semiconductor package, a second semiconductor package, and an interposer between the first and second semiconductor packages. The first semiconductor package includes a first semiconductor package substrate and a first semiconductor chip. The second semiconductor package includes a second semiconductor package substrate and a second semiconductor chip. The interposer electrically connects the first semiconductor package to the second semiconductor package and includes a first interposer hole passing through the interposer. The first semiconductor chip includes a second portion which protrudes from a first portion, and the second portion is inserted into the first interposer hole.
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