METHOD OF FABRICATING A SEMICONDUCTOR DEVICE
    4.
    发明申请
    METHOD OF FABRICATING A SEMICONDUCTOR DEVICE 审中-公开
    制造半导体器件的方法

    公开(公告)号:US20130183824A1

    公开(公告)日:2013-07-18

    申请号:US13733506

    申请日:2013-01-03

    CPC classification number: H01L21/76841 H01L21/02074 H01L21/76861

    Abstract: A method of fabricating a semiconductor device includes forming a first layer including a first metal, forming a second layer including a second metal, the second layer being adjacent to the first layer, polishing top surfaces of the first and second layers, and cleaning the first and second layers using a cleaning solution. The cleaning solution may include an etching solution etching the first and second layers and an inhibitor suppressing the second layer from being over etched.

    Abstract translation: 制造半导体器件的方法包括形成包括第一金属的第一层,形成包括第二金属的第二层,第二层邻近第一层,抛光第一层和第二层的顶表面,以及清洁第一层 和使用清洁溶液的第二层。 清洁溶液可以包括蚀刻溶液,蚀刻第一和第二层以及抑制第二层的抑制剂被过蚀刻。

    SEMICONDUCTOR PACKAGE
    5.
    发明公开

    公开(公告)号:US20240079400A1

    公开(公告)日:2024-03-07

    申请号:US18319193

    申请日:2023-05-17

    Inventor: Hongjin KIM

    CPC classification number: H01L25/18 H01L24/48 H01L24/49 H10B80/00 H01L25/0657

    Abstract: A semiconductor package includes a substrate, a controller chip on a first surface of the substrate, a first chip stack on the controller chip, a second chip stack on the substrate in adjacent spaced apart relationship with the first chip stack, a third chip stack including a first group of semiconductor chips above or below the first chip stack and a second group of semiconductor chips above or below the second chip stack. A buffer chip is on the substrate between the first chip stack and the second chip stack, and the buffer chip is electrically connected to the third chip stack and the controller chip. An encapsulant encapsulates at least a portion of the first chip stack, the second chip stack, and the third chip stack. Connection bumps are on an opposite second surface of the substrate. The first chip stack and the second chip stack are directly electrically connected to the controller chip, and the third chip stack is electrically connected to the controller chip by the buffer chip.

Patent Agency Ranking