公开(公告)号：US20220216227A1

公开(公告)日：2022-07-07

申请号：US17539523

申请日：2021-12-01

申请人： Samsung Electronics Co., Ltd.

发明人： Sangho RHA ,  Iksoo KIM ,  Jiwoon IM ,  Byungsun PARK ,  Seonkyu SHIN

IPC分类号： H01L27/11556 ,  H01L27/11582 ,  G11C5/06 ,  G11C5/02 ,  H01L29/423

摘要： A semiconductor device includes a memory cell structure on a substrate, and a dummy structure on a side of the memory cell structure. The memory cell structure includes a memory stack structure including interlayer insulating layers and gate electrodes alternately stacked on the substrate, channel structures penetrating through the memory stack structure and contacting the substrate, and first separation structures penetrating through the memory stack structure and extending in the first direction to separate the gate electrodes from each other in a second direction. The dummy structure includes dummy stack structures spaced apart from the memory stack structure and including first insulating layers and dummy gate electrodes alternately stacked, dummy channel structures penetrating through the dummy stack structures, and second separation structures penetrating through the dummy stack structures and extending in the second direction to separate the dummy gate electrodes from each other in the first direction.

公开(公告)号：US20220223524A1

公开(公告)日：2022-07-14

申请号：US17481609

申请日：2021-09-22

申请人： Samsung Electronics Co., Ltd.

发明人： Younseok CHOI ,  Byungsun PARK ,  Youngil LEE ,  Jaechul LEE ,  Jiwoon IM

IPC分类号： H01L23/535 ,  H01L23/528 ,  H01L23/532 ,  H01L27/11556 ,  H01L27/11529 ,  H01L27/11582 ,  H01L27/11573 ,  H01L21/768

摘要： A semiconductor device includes a lower memory stack disposed on a substrate and including lower gate electrodes and a lower staircase structure, an upper memory stack including upper gate electrodes and an upper staircase structure, a lower interlayer insulating layer doped with an impurity and covering the lower staircase structure, the lower interlayer insulating layer having a doping concentration gradually increasing toward the lower staircase structure, an upper interlayer insulating layer doped with an impurity and covering the upper staircase structure and the lower interlayer insulating layer, the upper interlayer insulating layer having a doping concentration gradually increasing toward the upper staircase structure and the lower interlayer insulating layer, lower contact plugs and upper contact plugs contacting the lower gate electrodes and the upper gate electrodes, respectively.

公开(公告)号：US20220136108A1

公开(公告)日：2022-05-05

申请号：US17577204

申请日：2022-01-17

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Byung-Sun PARK ,  Ik Soo KIM ,  Jiwoon IM ,  Sangho RHA ,  Minjae OH

IPC分类号： C23C16/455 ,  H01L21/67 ,  H01J37/32

摘要： A semiconductor manufacturing apparatus includes a chamber that includes a station in which a substrate is provided, a substrate holder that is in the station and receives the substrate, and lower showerheads below the substrate holder, the lower showerheads including an isotropic showerhead having first nozzle holes that isotropically provide a first reaction gas on a bottom surface of the substrate, and a striped showerhead having striped nozzle regions and striped blank regions between the striped nozzle regions, the striped nozzle regions having second nozzle holes that non-isotropically provide a second reaction gas on the bottom surface of the substrate.

公开(公告)号：US20210104538A1

公开(公告)日：2021-04-08

申请号：US16882829

申请日：2020-05-26

申请人： Samsung Electronics Co., Ltd.

发明人： Changsoo LEE ,  Jongmyeong LEE ,  Iksoo KIM ,  Jiwoon IM

IPC分类号： H01L27/11582 ,  H01L27/1157 ,  H01L29/792 ,  H01L27/11573 ,  G11C7/18 ,  H01L27/11565

摘要： A semiconductor device may comprise a stack structure on a substrate, the stack structure including a plurality of dielectric layers and a plurality of transparent conductive oxide layers, the dielectric layers and the transparent conductive oxide layers are alternately stacked, each of the dielectric layers and a corresponding one of the transparent conductive oxide layer adjacent to each other in a vertical direction have equal horizontal widths, and a channel structure extending through the stack structure, the channel structure including an information storage layer, a channel layer inside the information storage layer, and a buried dielectric layer inside the channel layer.

公开(公告)号：US20200325579A1

公开(公告)日：2020-10-15

申请号：US16750557

申请日：2020-01-23

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Byung-Sun PARK ,  Ik Soo KIM ,  Jiwoon IM ,  Sangho RHA ,  Minjae OH

IPC分类号： C23C16/455 ,  H01J37/32 ,  H01L21/67

摘要： A semiconductor manufacturing apparatus includes a chamber that includes a station in which a substrate is provided, a substrate holder that is in the station and receives the substrate, and lower showerheads below the substrate holder, the lower showerheads including an isotropic showerhead having first nozzle holes that isotropically provide a first reaction gas on a bottom surface of the substrate, and a striped showerhead having striped nozzle regions and striped blank regions between the striped nozzle regions, the striped nozzle regions having second nozzle holes that non-isotropically provide a second reaction gas on the bottom surface of the substrate.