公开(公告)号：US10580688B2

公开(公告)日：2020-03-03

申请号：US16037460

申请日：2018-07-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun-Chul Yoon ,  Yeong-Shin Park ,  Joonghee Kim ,  Jihee Kim ,  Dongjun Shin ,  Kukhan Yoon ,  Taeseop Choi ,  Jungheun Hwang

IPC: H01L21/033 ,  H01L21/768 ,  H01L21/311 ,  H01L21/027 ,  H01L29/66 ,  H01L27/108 ,  H01L27/22 ,  H01L27/24 ,  H01L45/00 ,  H01L43/12

Abstract: Disclosed is a method of fabricating a semiconductor device. The method comprises stacking an etching target layer, a first mask layer, an under layer, and a photoresist layer on a substrate, irradiating extreme ultraviolet (EUV) radiation on the photoresist layer to form a photoresist pattern, and performing a nitrogen plasma treatment on the photoresist pattern while using the first mask layer as an etching stop layer, the performing continuing until a top surface of the first mask layer is exposed. During the performing, the under layer is etched to form an under pattern below the photoresist pattern.

公开(公告)号：US11380552B2

公开(公告)日：2022-07-05

申请号：US16858591

申请日：2020-04-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunchul Yoon ,  Mincheol Kwak ,  Joonghee Kim ,  Jihee Kim ,  Yeongshin Park ,  Jungheun Hwang

IPC: H01L21/308 ,  H01L27/108

Abstract: In order to manufacture an integrated circuit device, a feature layer is formed on a substrate in a first area for forming a plurality of chips and in a second area surrounding the first area. The feature layer has a step difference in the second area. On the feature layer, a hard mask structure including a plurality of hard mask layers stacked on each other is formed. In the first area and the second area, a protective layer covering the hard mask structure is formed. On the protective layer, a photoresist layer is formed. A photoresist pattern is formed by exposing and developing the photoresist layer in the first area by using the step difference in the second area as an alignment key.

公开(公告)号：US20210210493A1

公开(公告)日：2021-07-08

申请号：US17028763

申请日：2020-09-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jihee Kim ,  Yeongshin Park ,  Hyunchul Yoon ,  Joonghee Kim ,  Jungheun Hwang

IPC: H01L27/108

Abstract: A semiconductor device includes bit line structures disposed on a substrate, each bit line structure comprising a bit line and an insulating spacer structure, buried contacts which fill lower portions of spaces between bit line structures in the substrate, and landing pads which fill upper portions of the spaces, extend from upper surfaces of the buried contacts to upper surfaces of the bit line structures, and are spaced apart from each other by insulating structures. A first insulating structure is disposed between a first landing pad and a first bit line structure. The first insulating structure includes a sidewall extending along a sidewall of the first landing pad toward the substrate. In a direction extending toward the substrate, the sidewall of the first insulating structure gets closer to a first sidewall of the first bit line structure.

公开(公告)号：US20190214295A1

公开(公告)日：2019-07-11

申请号：US16037460

申请日：2018-07-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun-Chul YOON ,  Yeong-Shin Park ,  Joonghee Kim ,  Jihee Kim ,  Dongjun Shin ,  Kukhan Yoon ,  Taeseop Choi ,  Jungheun Hwang

IPC: H01L21/768 ,  H01L29/66 ,  H01L21/033 ,  H01L21/311 ,  H01L21/027

Abstract: Disclosed is a method of fabricating a semiconductor device. The method comprises stacking an etching target layer, a first mask layer, an under layer, and a photoresist layer on a substrate, irradiating extreme ultraviolet (EUV) radiation on the photoresist layer to form a photoresist pattern, and performing a nitrogen plasma treatment on the photoresist pattern while using the first mask layer as an etching stop layer, the performing continuing until a top surface of the first mask layer is exposed. During the performing, the under layer is etched to form an under pattern below the photoresist pattern.

公开(公告)号：US12238920B2

公开(公告)日：2025-02-25

申请号：US17971256

申请日：2022-10-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jihee Kim ,  Yeongshin Park ,  Hyunchul Yoon ,  Joonghee Kim ,  Jungheun Hwang

IPC: H10B12/00 ,  H01L21/764 ,  H01L21/768 ,  H01L29/66

Abstract: A semiconductor device includes bit line structures disposed on a substrate, each bit line structure comprising a bit line and an insulating spacer structure, buried contacts which fill lower portions of spaces between bit line structures in the substrate, and landing pads which fill upper portions of the spaces, extend from upper surfaces of the buried contacts to upper surfaces of the bit line structures, and are spaced apart from each other by insulating structures. A first insulating structure is disposed between a first landing pad and a first bit line structure. The first insulating structure includes a sidewall extending along a sidewall of the first landing pad toward the substrate. In a direction extending toward the substrate, the sidewall of the first insulating structure gets closer to a first sidewall of the first bit line structure.

公开(公告)号：US20230037972A1

公开(公告)日：2023-02-09

申请号：US17971256

申请日：2022-10-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jihee Kim ,  Yeongshin Park ,  Hyunchul Yoon ,  Joonghee Kim ,  Jungheun Hwang

IPC: H01L27/108 ,  H01L21/768 ,  H01L29/66 ,  H01L21/764

Abstract: A semiconductor device includes bit line structures disposed on a substrate, each bit line structure comprising a bit line and an insulating spacer structure, buried contacts which fill lower portions of spaces between bit line structures in the substrate, and landing pads which fill upper portions of the spaces, extend from upper surfaces of the buried contacts to upper surfaces of the bit line structures, and are spaced apart from each other by insulating structures. A first insulating structure is disposed between a first landing pad and a first bit line structure. The first insulating structure includes a sidewall extending along a sidewall of the first landing pad toward the substrate. In a direction extending toward the substrate, the sidewall of the first insulating structure gets closer to a first sidewall of the first bit line structure.

公开(公告)号：US11508732B2

公开(公告)日：2022-11-22

申请号：US17028763

申请日：2020-09-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jihee Kim ,  Yeongshin Park ,  Hyunchul Yoon ,  Joonghee Kim ,  Jungheun Hwang

IPC: H01L27/108 ,  H01L21/768 ,  H01L29/66 ,  H01L21/764

Abstract: A semiconductor device includes bit line structures disposed on a substrate, each bit line structure comprising a bit line and an insulating spacer structure, buried contacts which fill lower portions of spaces between bit line structures in the substrate, and landing pads which fill upper portions of the spaces, extend from upper surfaces of the buried contacts to upper surfaces of the bit line structures, and are spaced apart from each other by insulating structures. A first insulating structure is disposed between a first landing pad and a first bit line structure. The first insulating structure includes a sidewall extending along a sidewall of the first landing pad toward the substrate. In a direction extending toward the substrate, the sidewall of the first insulating structure gets closer to a first sidewall of the first bit line structure.