公开(公告)号：US20240136398A1

公开(公告)日：2024-04-25

申请号：US18323715

申请日：2023-05-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junmo PARK ,  Wookhyun KWON ,  Yeonho PARK ,  Jongmin SHIN ,  Heonjong SHIN ,  Jongmin JUN ,  Kyubong CHOI

IPC: H01L29/06 ,  H01L29/24 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/0673 ,  H01L29/24 ,  H01L29/42364 ,  H01L29/42392 ,  H01L29/775 ,  H01L29/78696

Abstract: A semiconductor device may include a substrate including an active pattern, a channel pattern on the active pattern, a source/drain pattern, a gate electrode, and an insulation pattern. The channel pattern may include semiconductor patterns that are spaced apart from each other and vertically stacked. A lowermost one of the semiconductor patterns may be a first semiconductor pattern. The source/drain pattern may be connected to the semiconductor patterns. The gate electrode may be on the semiconductor patterns and may include a plurality of inner electrodes below the semiconductor patterns except the first semiconductor pattern. The insulation pattern may be between the first semiconductor pattern and the active pattern. The insulation pattern may include a dielectric pattern and a protection layer. The protection layer may be between the dielectric pattern and the first semiconductor pattern. The protection layer may be between the dielectric pattern and the active pattern.

公开(公告)号：US20250022205A1

公开(公告)日：2025-01-16

申请号：US18620374

申请日：2024-03-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junmo PARK ,  Arun RADHAKRISSHNAN ,  Seyeong BYEON

IPC: G06T15/00 ,  G06F9/30

Abstract: Methods and apparatuses for performing precision-modulated shading (PMS) using a graphics processing unit (GPU), including: obtaining a shading instruction corresponding to a floating-point operand; determining a precision mode which applies to the shading instruction from among a plurality of precision modes for processing shading instructions; and based on the determined precision mode, truncating the floating-point operand, and executing the shading instruction using the truncated floating-point operand.

公开(公告)号：US20240274679A1

公开(公告)日：2024-08-15

申请号：US18435168

申请日：2024-02-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongmin SHIN ,  Junmo PARK ,  Kyubong CHOI

IPC: H01L29/417 ,  H01L27/12 ,  H01L29/423 ,  H01L29/45 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/41733 ,  H01L27/124 ,  H01L27/1266 ,  H01L29/458 ,  H01L29/775 ,  H01L29/78696 ,  H01L29/42392

Abstract: An integrated circuit device may include a fin-type active structure elongated in a first horizontal direction, a nanosheet stack including nanosheets on the fin-type active structure, a gate structure extending between the nanosheets, a source/drain structure on the fin-type active structure at a position adjacent to the gate structure and facing the nanosheet stack in the first horizontal direction, a vertical separation layer including a silicon layer in contact with a silicide separation layer. The silicide separation layer may be between the source/drain structure and each of the nanosheet stack and the gate structure. The silicon separation layer may be between the silicide separation layer and each of the nanosheet stack and the gate structure. The source/drain structure may include a metal. The gate structure may include at least one sub-gate surrounding at least one nanosheet among the plurality of nanosheets on the fin-type active structure.

公开(公告)号：US20230066341A1

公开(公告)日：2023-03-02

申请号：US17704185

申请日：2022-03-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junmo PARK ,  Yeonho PARK ,  Wangseop LIM ,  Kyubong CHOI

IPC: H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/51

Abstract: A semiconductor device includes a substrate including first and second active regions, first and second active patterns on the first and second active regions, and a gate electrode crossing the first and second active patterns. The gate electrode may include first and second electrode portions on the first and second active regions. The first electrode portion may include a first metal pattern and a second metal pattern on the first metal pattern. The second electrode portion may include a third metal pattern and a fourth metal pattern on the third metal pattern. The first metal pattern may include a first line portion and a first vertical portion extended from the first line portion, and the third metal pattern may include a second line portion and a second vertical portion extended from the second line portion. The first and second vertical portions may be in contact with each other.

公开(公告)号：US20240347596A1

公开(公告)日：2024-10-17

申请号：US18512322

申请日：2023-11-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junmo PARK ,  Deokhwan Kim ,  Junsu Kong ,  Yeonho Park ,  Hyungjin Park ,  Sujin Lee ,  Jinseok Lee

IPC: H01L29/06 ,  H01L27/092 ,  H01L29/417 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/0673 ,  H01L27/092 ,  H01L29/0649 ,  H01L29/41733 ,  H01L29/42392 ,  H01L29/775 ,  H01L29/78696

Abstract: A semiconductor device including a substrate having an active pattern, first and second semiconductor patterns provided on the active pattern vertically spaced apart from each other, a source/drain pattern connected to the first and second semiconductor patterns, a gate electrode between the first and second semiconductor patterns, and a gate insulating pattern enclosing the gate electrode, wherein the gate insulating pattern includes, a high-k dielectric pattern enclosing the gate electrode, an inner spacer between the high-k dielectric pattern and the source/drain pattern, and a mask insulating pattern having an etch selectivity with respect to the inner spacer between the high-k dielectric pattern and the inner spacer.

公开(公告)号：US20240127805A1

公开(公告)日：2024-04-18

申请号：US18392369

申请日：2023-12-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sichen JIN ,  Kwangyoun KIM ,  Sungsoo KIM ,  Junmo PARK ,  Dhairya SANDHYANA ,  Changwoo HAN

IPC: G10L15/183 ,  G06V10/20 ,  G10L15/26 ,  H04N21/488

CPC classification number: G10L15/183 ,  G06V10/255 ,  G10L15/26 ,  H04N21/4884

Abstract: An electronic apparatus and a control method thereof are provided. The electronic apparatus includes a communication interface configured to receive content comprising image data and speech data; a memory configured to store a language contextual model trained with relevance between words; a display; and a processor configured to: extract an object and a character included in the image data, identify an object name of the object and the character, generate a bias keyword list comprising an image-related word that is associated with the image data, based on the identified object name and the identified character, convert the speech data to a text based on the bias keyword list and the language contextual model, and control the display to display the text that is converted from the speech data, as a caption.

公开(公告)号：US20230360645A1

公开(公告)日：2023-11-09

申请号：US17430614

申请日：2021-06-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sichen JIN ,  Kwangyoun KIM ,  Sungsoo KIM ,  Junmo PARK ,  Dhairya SANDHYANA ,  Changwoo HAN

IPC: G10L15/183 ,  G10L15/26 ,  G06V10/20 ,  H04N21/488

CPC classification number: G10L15/183 ,  G10L15/26 ,  G06V10/255 ,  H04N21/4884

Abstract: An electronic apparatus and a control method thereof are provided. The electronic apparatus includes a communication interface configured to receive content comprising image data and speech data; a memory configured to store a language contextual model trained with relevance between words; a display; and a processor configured to: extract an object and a character included in the image data, identify an object name of the object and the character, generate a bias keyword list comprising an image-related word that is associated with the image data, based on the identified object name and the identified character, convert the speech data to a text based on the bias keyword list and the language contextual model, and control the display to display the text that is converted from the speech data, as a caption.

公开(公告)号：US20230238441A1

公开(公告)日：2023-07-27

申请号：US17966375

申请日：2022-10-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junmo PARK ,  Yeonho PARK ,  WookHyun KWON ,  Kern RIM

IPC: H01L29/423 ,  H01L27/092 ,  H01L23/522 ,  H01L23/528 ,  H01L29/49

CPC classification number: H01L29/42392 ,  H01L27/092 ,  H01L23/5226 ,  H01L23/5283 ,  H01L29/4908 ,  H01L29/0673

Abstract: A semiconductor device may include a substrate including first and second active regions, which are adjacent to each other, first and second active patterns provided on the first and second active regions, respectively, and a gate electrode extended to cross the first and second active patterns. The gate electrode may include first and second electrode portions provided on the first and second active regions, respectively. The second electrode portion may include a first metal pattern, an etch barrier pattern, a second metal pattern, and a third metal pattern sequentially covering the second active pattern. The first electrode portion may include a second metal pattern covering the first active pattern. The etch barrier pattern may be in contact with the first metal pattern and the second metal pattern, and the etch barrier pattern may be thinner than the first metal pattern and thinner than the second metal pattern.

公开(公告)号：US20230014468A1

公开(公告)日：2023-01-19

申请号：US17691293

申请日：2022-03-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junmo PARK ,  Yeonho PARK ,  Kyubong CHOI ,  Eunsil PARK ,  Junseok LEE ,  Jinseok LEE

IPC: H01L27/088 ,  H01L21/8234 ,  H01L21/762

Abstract: A semiconductor device includes a substrate including a first active fin and a second active fin respectively extending in a first direction, the substrate having a recess between the first and second active fins, a device isolation film on the substrate, first and second gate structures on the first and second active fins, respectively, and extending in a second direction, and a field separation layer having a first portion between the first and second active fin and in the recess, and a second portion extending from both sides of the first portion in the second direction to an upper surface of the device isolation film. The recess has a bottom surface lower in a third direction intersecting the first direction and the second direction than the upper surface of the device isolation film, and a region of the upper surface of the device isolation film has a flat surface.

公开(公告)号：US20240234502A9

公开(公告)日：2024-07-11

申请号：US18323715

申请日：2023-05-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junmo PARK ,  Wookhyun KWON ,  Yeonho PARK ,  Jongmin SHIN ,  Heonjong SHIN ,  Jongmin JUN ,  Kyubong CHOI

IPC: H01L29/06 ,  H01L29/24 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/0673 ,  H01L29/24 ,  H01L29/42364 ,  H01L29/42392 ,  H01L29/775 ,  H01L29/78696

Abstract: A semiconductor device may include a substrate including an active pattern, a channel pattern on the active pattern, a source/drain pattern, a gate electrode, and an insulation pattern. The channel pattern may include semiconductor patterns that are spaced apart from each other and vertically stacked. A lowermost one of the semiconductor patterns may be a first semiconductor pattern. The source/drain pattern may be connected to the semiconductor patterns. The gate electrode may be on the semiconductor patterns and may include a plurality of inner electrodes below the semiconductor patterns except the first semiconductor pattern. The insulation pattern may be between the first semiconductor pattern and the active pattern. The insulation pattern may include a dielectric pattern and a protection layer. The protection layer may be between the dielectric pattern and the first semiconductor pattern. The protection layer may be between the dielectric pattern and the active pattern.