公开(公告)号：US20170092730A1

公开(公告)日：2017-03-30

申请号：US15165145

申请日：2016-05-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ho-Jun KIM ,  Sung-Dae SUK

IPC: H01L29/423 ,  H01L29/66 ,  H01L29/786 ,  H01L29/51

CPC classification number: H01L29/42392 ,  B82Y10/00 ,  H01L28/00 ,  H01L29/0673 ,  H01L29/42364 ,  H01L29/51 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/78645

Abstract: A semiconductor device includes a semiconductor pattern on a substrate along a first direction, a blocking pattern on a top surface of the semiconductor pattern, a first wire pattern on the blocking pattern along a second direction different from the first direction, the first wire including a first part and a second part on opposite sides of the first part, a gate electrode surrounding the first part of the first wire pattern, and a contact surrounding the second part of the first wire pattern, wherein a height of a bottom surface of the contact from a top surface of the substrate is different from a height of a bottom surface of the gate electrode from the top surface of the substrate.

公开(公告)号：US20140332863A1

公开(公告)日：2014-11-13

申请号：US14248594

申请日：2014-04-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JaeHoo PARK ,  Daewon HA ,  Uihui KWON ,  Sung-Dae SUK

IPC: H01L29/78 ,  H01L29/66

CPC classification number: H01L29/785 ,  H01L27/092 ,  H01L29/66795 ,  H01L29/7853

Abstract: Provided are a semiconductor device and a method of manufacturing the same. The method of manufacturing a semiconductor device includes forming an active fin on a substrate; oxidizing a portion of the active fin to form an insulating pattern between the active fin and the substrate; forming a first gate pattern on the substrate, wherein the first gate pattern crosses the active fin; exposing the substrate on both sides of the first gate pattern; and forming source/drain regions on the exposed substrate.

Abstract translation: 提供半导体器件及其制造方法。 制造半导体器件的方法包括：在衬底上形成有源散热片; 氧化活性鳍片的一部分以在活性鳍片和衬底之间形成绝缘图案; 在所述衬底上形成第一栅极图案，其中所述第一栅极图案与所述有源鳍片交叉; 在第一栅极图案的两侧上暴露衬底; 以及在暴露的衬底上形成源极/漏极区域。

公开(公告)号：US20220140150A1

公开(公告)日：2022-05-05

申请号：US17574166

申请日：2022-01-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Mongsong LIANG ,  Sung-Dae SUK ,  Geumjong BAE

IPC: H01L29/786 ,  H01L29/06 ,  H01L29/78 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66 ,  H01L27/11 ,  H01L29/16 ,  H01L29/423 ,  H01L27/088 ,  H01L21/8234

Abstract: A semiconductor device includes a first transistor, a second transistor and a third transistor provided on a substrate, the first to third transistors respectively including source and drain regions spaced apart from each other, a gate structure extending in a first direction on the substrate and interposed between the source and drain regions, and a channel region connecting the source and drain regions to each other. A channel region of the second transistor and a channel region of the third transistor respectively include a plurality of channel portions, the plurality of channel portions spaced apart from each other in a second direction, perpendicular to an upper surface of the substrate, and connected to the source and drain regions, respectively. A width of a channel portion of the third transistor in the first direction is greater than a width of a channel portion of the second transistor in the first direction.

公开(公告)号：US20170170331A1

公开(公告)日：2017-06-15

申请号：US15238059

申请日：2016-08-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Mongsong LIANG ,  Sung-Dae SUK ,  Geumjong BAE

IPC: H01L29/786 ,  H01L29/423 ,  H01L29/78 ,  H01L29/16 ,  H01L27/11 ,  H01L29/165 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/06 ,  H01L29/161

CPC classification number: H01L29/78696 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823437 ,  H01L27/088 ,  H01L27/1104 ,  H01L27/1116 ,  H01L29/0673 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/7848 ,  H01L29/78618

Abstract: A semiconductor device includes a first transistor, a second transistor and a third transistor provided on a substrate, the first to third transistors respectively including source and drain regions spaced apart from each other, a gate structure extending in a first direction on the substrate and interposed between the source and drain regions, and a channel region connecting the source and drain regions to each other. A channel region of the second transistor and a channel region of the third transistor respectively include a plurality of channel portions, the plurality of channel portions spaced apart from each other in a second direction, perpendicular to an upper surface of the substrate, and connected to the source and drain regions, respectively. A width of a channel portion of the third transistor in the first direction is greater than a width of a channel portion of the second transistor in the first direction.

公开(公告)号：US20240250186A1

公开(公告)日：2024-07-25

申请号：US18598672

申请日：2024-03-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Mongsong LIANG ,  Sung-Dae SUK ,  Geumjong BAE

IPC: H01L29/786 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/06 ,  H01L29/16 ,  H01L29/161 ,  H01L29/165 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78 ,  H10B10/00

CPC classification number: H01L29/78696 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823437 ,  H01L27/088 ,  H01L29/0673 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/7848 ,  H01L29/78618 ,  H10B10/12 ,  H10B10/18

Abstract: A semiconductor device includes a first transistor, a second transistor and a third transistor provided on a substrate, the first to third transistors respectively including source and drain regions spaced apart from each other, a gate structure extending in a first direction on the substrate and interposed between the source and drain regions, and a channel region connecting the source and drain regions to each other. A channel region of the second transistor and a channel region of the third transistor respectively include a plurality of channel portions, the plurality of channel portions spaced apart from each other in a second direction, perpendicular to an upper surface of the substrate, and connected to the source and drain regions, respectively. A width of a channel portion of the third transistor in the first direction is greater than a width of a channel portion of the second transistor in the first direction.

公开(公告)号：US20180083007A1

公开(公告)日：2018-03-22

申请号：US15613334

申请日：2017-06-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Juri LEE ,  Yong-Suk TAK ,  Sung-Dae SUK ,  Seungmin SONG

IPC: H01L27/092 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/10 ,  H01L29/423

CPC classification number: H01L27/0924 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823828 ,  H01L21/823878 ,  H01L27/092 ,  H01L29/0653 ,  H01L29/1037 ,  H01L29/42356 ,  H01L29/42392 ,  H01L29/78696

Abstract: Disclosed are semiconductor devices including a field effect transistor and methods of manufacturing the same. The semiconductor device comprises a device isolation layer in an upper portion of a substrate, first active patterns on a first region of the substrate and second active patterns on a second region of the substrate, gate structures extending in one direction and running across the first and second active patterns, and a blocking layer on a recessed region of the device isolation layer of the first region. Each of the first and second active patterns comprises a plurality of semiconductor patterns that are vertically stacked and spaced apart from each other. The semiconductor patterns of the first active patterns have conductivity different from that of the semiconductor patterns of the second active patterns. The blocking layer is limited on the first region.

公开(公告)号：US20160190239A1

公开(公告)日：2016-06-30

申请号：US14583258

申请日：2014-12-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sung-Dae SUK ,  Kang-III SEO

IPC: H01L29/06 ,  H01L29/16 ,  H01L29/423 ,  H01L29/49 ,  H01L27/092 ,  H01L27/12

CPC classification number: H01L29/0649 ,  H01L21/823807 ,  H01L27/092 ,  H01L27/0924 ,  H01L27/1104 ,  H01L27/1203 ,  H01L27/1211 ,  H01L29/0673 ,  H01L29/16 ,  H01L29/42392 ,  H01L29/495 ,  H01L29/78654 ,  H01L29/78696

Abstract: A semiconductor device is provided. The semiconductor device includes a sacrificial layer formed on a substrate, an active layer formed on the sacrificial layer, a gate insulating layer and a gate electrode formed to surround a part of the active layer, a spacer disposed on at least one side of the gate electrode, a source or drain separated from the gate electrode by the spacer and disposed on the substrate, and an air gap arrange between a lower portion of the active layer and the sacrificial layer, wherein the sacrificial layer is disposed on a lower portion of the source or drain and is not disposed on a lower portion of the gate electrode.

Abstract translation: 提供半导体器件。 半导体器件包括形成在衬底上的牺牲层，形成在牺牲层上的有源层，栅极绝缘层和形成为围绕有源层的一部分的栅电极，设置在栅极的至少一侧的间隔物 电极，通过间隔物与栅电极分离并设置在衬底上的源极或漏极，以及布置在有源层的下部与牺牲层之间的气隙，其中牺牲层设置在衬底的下部 源极或漏极，并且不设置在栅电极的下部。