Abstract:
Orientation-dependent etching is employed in the fabrication of a monolithic semiconductor circuit network to provide electrical isolation and increased packing density, while minimizing collector series resistance and output capacitance. Collector contact to a transistor component is made by the direct metallization of a buried low-resistivity substrate region exposed by the preferential etching operation.
Abstract:
An associative memory circuit suitable for integrated circuit fabrication, using multiemitter transistor logic techniques employs base-to-collector cross-coupled, bistable multivibrators to provide better memory cells with fewer components. In a circuit comprised of a plurality of memory cells, each cell includes means for addressing the cell, means for writing into it, means for reading out of it, and means for indicating whether the information stored therein is equal to other reference information, coupled to various emitters of the multiemitter transistors.
Abstract:
A high stability, binary data, multiphase shift register of at least three phases, stores and shifts ''''N'''' bits of binary information in approximately (N X n)/(n-1) binary switches, where n is the number of phases utilized in the register, and N is the maximum number of bits capable of being stored in the shift register at all times during its operation. The binary switches are connected in series and each is then selectively connected to one of the n phases.