公开(公告)号：US11127852B2

公开(公告)日：2021-09-21

申请号：US16233643

申请日：2018-12-27

Applicant: Texas Instruments Incorporated

Inventor： Sunglyong Kim ,  Seetharaman Sridhar ,  Hong Yang ,  Ya Ping Chen ,  Yunlong Liu ,  Fei Ma

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/40 ,  H01L21/225 ,  H01L29/10 ,  H01L29/06 ,  H01L29/66 ,  H01L21/8238 ,  H01L29/08

Abstract: A trench gate metal oxide semiconductor field effect transistor (MOSFET) device includes an epitaxial layer on a substrate both doped a first conductivity type. Active area trenches have polysilicon gates over a double shield field plate. A junction termination trench includes a single shield field plate in a junction termination area which encloses the active area that includes a retrograde dopant profile of the second conductivity type into the epitaxial layer in the junction termination area. Pbody regions of a second conductivity type are between active trenches and between the outermost active trench and the junction termination trench. Source regions of the first conductivity type are in the body regions between adjacent active trenches. Metal contacts are over contact apertures that extend through a pre-metal dielectric layer reaching the body region under the source region, the single shield field plate, and that couples together the polysilicon gates.

公开(公告)号：US11791198B2

公开(公告)日：2023-10-17

申请号：US17695119

申请日：2022-03-15

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Hong Yang ,  Seetharaman Sridhar ,  Ya ping Chen ,  Fei Ma ,  Yunlong Liu ,  Sunglyong Kim

IPC: H01L21/762 ,  H01L21/763 ,  H01L29/66 ,  H01L21/308 ,  H01L21/02 ,  H01L21/324

CPC classification number: H01L21/76235 ,  H01L21/02164 ,  H01L21/308 ,  H01L21/324 ,  H01L21/763 ,  H01L21/76283 ,  H01L21/76286 ,  H01L29/66666

Abstract: A semiconductor device has a semiconductor material in a substrate. The semiconductor device has an MOS transistor. A trench in the substrate extends from a top surface of the substrate) into the semiconductor material. A shield is disposed in the trench. The shield has a contact portion which extends toward a top surface of the trench. A gate of the MOS transistor is disposed in the trench over the shield. The gate is electrically isolated from the shield. The gate is electrically isolated from the contact portion of the shield by a shield isolation layer which covers an angled surface of the contact portion extending toward the top of the trench. Methods of forming the semiconductor device are disclosed.

公开(公告)号：US11302568B2

公开(公告)日：2022-04-12

申请号：US16546499

申请日：2019-08-21

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Hong Yang ,  Seetharaman Sridhar ,  Ya ping Chen ,  Fei Ma ,  Yunlong Liu ,  Sunglyong Kim

IPC: H01L21/762 ,  H01L21/763 ,  H01L21/308 ,  H01L29/66 ,  H01L21/02 ,  H01L21/324

Abstract: A semiconductor device has a semiconductor material in a substrate. The semiconductor device has an MOS transistor. A trench in the substrate extends from a top surface of the substrate) into the semiconductor material. A shield is disposed in the trench. The shield has a contact portion which extends toward a top surface of the trench. A gate of the MOS transistor is disposed in the trench over the shield. The gate is electrically isolated from the shield. The gate is electrically isolated from the contact portion of the shield by a shield isolation layer which covers an angled surface of the contact portion extending toward the top of the trench. Methods of forming the semiconductor device are disclosed.

公开(公告)号：US11322594B2

公开(公告)日：2022-05-03

申请号：US17134706

申请日：2020-12-28

Applicant: Texas Instruments Incorporated

Inventor： Fei Ma ,  Ya ping Chen ,  Yunlong Liu ,  Hong Yang ,  Shengpin Yang ,  Baoqiang Niu ,  Rui Liu ,  Zhi Peng Feng ,  Seetharaman Sridhar ,  Sunglyong Kim

IPC: H01L29/40 ,  H01L29/78 ,  H01L29/66 ,  H01L21/765 ,  H01L29/423 ,  H01L27/24 ,  H01L21/8234

Abstract: A semiconductor device, and methods of forming the same. In one example, the semiconductor device includes a trench in a substrate having a top surface, and a shield within the trench. The semiconductor device also includes a shield liner between a sidewall of the trench and the shield, and a lateral insulator over the shield contacting the shield liner. The semiconductor device also includes a gate dielectric layer on an exposed sidewall of the trench between the lateral insulator and the top surface. The lateral insulator may have a minimum thickness at least two times thicker than a maximum thickness of the gate dielectric layer.