Rdson-based current sensing system

    公开(公告)号:US11949320B2

    公开(公告)日:2024-04-02

    申请号:US17678220

    申请日:2022-02-23

    CPC classification number: H02M1/0009 H02M3/158

    Abstract: A device includes a current mirror, a switch, first and second current paths, first and second buffers, a variable resistor, a temperature-sensing circuit, and a controller. The first current path is coupled between the current mirror's input and the switch. The switch switches between ground and a transistor based on a control signal. The second current path is coupled between a first current mirror output and ground. The first buffer is coupled to a second current mirror output. The second buffer is coupled to the variable resistor, which is coupled to the first buffer. The temperature-sensing circuit provides a device temperature to the controller, which is coupled to a first buffer output and determines a first adjustment to the first and second current paths and a second adjustment to the variable resistor based on the device temperature.

    Dynamic phase change mechanism in multi-phase converters

    公开(公告)号:US11005370B2

    公开(公告)日:2021-05-11

    申请号:US15094866

    申请日:2016-04-08

    Abstract: The disclosure provides a multi-phase converter. The multi-phase converter includes a controller and one or more switches. The one or more switches are coupled to the controller, and configured to receive an input voltage. A switch of the one or more switches is activated by the controller in a predefined phase of N phases in the multi-phase converter, where N is a positive integer. A processing unit is coupled to the controller and estimates a number of phases to be activated based on a load current. The processing unit also stores a threshold current limit corresponding to each phase of the N phases based on the input voltage and a switching frequency.

    POWER CONVERTER CONTROL
    6.
    发明公开

    公开(公告)号:US20240039402A1

    公开(公告)日:2024-02-01

    申请号:US18376230

    申请日:2023-10-03

    CPC classification number: H02M3/155 H03K5/24 H02M1/08

    Abstract: In some examples, a circuit includes a state machine. The state machine is configured to operate in a first state in which the state machine gates a pulse width modulation (PWM) signal provided for control of a power converter according to a first signal provided by a voltage control loop. The state machine is configured to operate in a second state in which the state machine gates the PWM signal according to a second signal provided by a current limit comparator. The state machine is configured to transition from the first state to the second state responsive to the second signal being asserted after the first signal is asserted in a switching cycle of the power converter. The state machine is configured to transition from the current state to the first state responsive to the first signal being asserted after the second signal in a switching cycle of the power converter.

    Dynamic overcurrent limit threshold for a voltage regulator

    公开(公告)号:US11757351B2

    公开(公告)日:2023-09-12

    申请号:US17390539

    申请日:2021-07-30

    CPC classification number: H02M1/32 H02M3/155 H03K5/24

    Abstract: Described embodiments include a voltage regulator circuit comprising a first comparator having a first comparator input coupled to a waveform input source, a second comparator input coupled to an output voltage terminal and a first comparator output. There is a second comparator having third and fourth comparator inputs and a second comparator output, the third comparator input coupled to a voltage source configured to provide a voltage representing a current limit, and the fourth comparator input coupled to the output voltage terminal. There is also a state machine having a first state machine input coupled to the first comparator output, a second state machine input coupled to the second comparator output and a state machine output, wherein a state of the state machine is determined by the first and second comparator outputs, and the state machine output provides a PWM signal responsive to the state of the state machine.

    Current sharing power stage for phase multiplication applications

    公开(公告)号:US11682900B2

    公开(公告)日:2023-06-20

    申请号:US17339576

    申请日:2021-06-04

    CPC classification number: H02J1/106 G06F1/3203 H02M3/158

    Abstract: A system includes a first power stage circuit having a first PWM input, a first voltage input and a first power output. The first power stage circuit is configured to provide a first current at the first power output responsive to a PWM signal at the first PWM input, and configured to receive a voltage at the first voltage input. The system includes a second power stage circuit having a second PWM input, a second voltage input and a second power output. The second voltage input is coupled to the first voltage input, and the second power stage circuit is configured to provide a second current at the second power output responsive to the PWM signal at the second PWM input. The second power stage circuit is configured to receive the voltage at the second voltage input, the voltage representing an average of the first current and the second current.

    Direct Current (DC)-DC Converter
    10.
    发明申请

    公开(公告)号:US20220231605A1

    公开(公告)日:2022-07-21

    申请号:US17152223

    申请日:2021-01-19

    Abstract: A converter stage having a control pin, an input voltage pin, an output pin, a ground pin, a high-side switch coupled between the input voltage pin and the output pin, a low-side switch coupled between the output pin and the ground pin, a current sensor configured to detect a current at the output pin, and control logic coupled to the control pin and the current sensor. The control logic is configured to control switching of the high-side and the low-side switches in continuous conduction mode, discontinuous conduction mode, and body braking control for the converter stage in response to a first signal received via the control line and a second signal received from the current sensor. A driver controls switching, based on the detected current and sequential event tracking, between an on state and an off state.

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