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公开(公告)号:US11949320B2
公开(公告)日:2024-04-02
申请号:US17678220
申请日:2022-02-23
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Vishnuvardhan Reddy Jaladanki , Preetam Charan Anand Tadeparthy , Scott Ragona , Rengang Chen , Evan Michael Reutzel , Bhaskar Ramachandran
CPC classification number: H02M1/0009 , H02M3/158
Abstract: A device includes a current mirror, a switch, first and second current paths, first and second buffers, a variable resistor, a temperature-sensing circuit, and a controller. The first current path is coupled between the current mirror's input and the switch. The switch switches between ground and a transistor based on a control signal. The second current path is coupled between a first current mirror output and ground. The first buffer is coupled to a second current mirror output. The second buffer is coupled to the variable resistor, which is coupled to the first buffer. The temperature-sensing circuit provides a device temperature to the controller, which is coupled to a first buffer output and determines a first adjustment to the first and second current paths and a second adjustment to the variable resistor based on the device temperature.
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公开(公告)号:US11881774B2
公开(公告)日:2024-01-23
申请号:US17200564
申请日:2021-03-12
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Bikash Kumar Pradhan , Preetam Charan Anand Tadeparthy , Muthusubramanian Venkateswaran , Venkatesh Wadeyar , Siddaram Mathapathi
CPC classification number: H02M3/158 , H02M1/00 , H02M1/0045
Abstract: A controller includes: a pulse-width modulation (PWM) circuit; a control loop; and a reference voltage controller. The control loop has: a feedback input adapted to be coupled to an output voltage of a power stage; a control loop output coupled to a PWM control input; and an operational amplifier with a first feedback input, a first reference input, and an amplifier output, the first feedback input connected to the feedback input, and the amplifier output coupled to the PWM control input. The reference voltage controller has a reference voltage output coupled to the first reference input, the reference voltage controller configured to adjust a reference voltage provided to the reference voltage output responsive to a dynamic error estimate based on error in the operational amplifier.
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公开(公告)号:US11005370B2
公开(公告)日:2021-05-11
申请号:US15094866
申请日:2016-04-08
Applicant: Texas Instruments Incorporated
IPC: H02M3/158
Abstract: The disclosure provides a multi-phase converter. The multi-phase converter includes a controller and one or more switches. The one or more switches are coupled to the controller, and configured to receive an input voltage. A switch of the one or more switches is activated by the controller in a predefined phase of N phases in the multi-phase converter, where N is a positive integer. A processing unit is coupled to the controller and estimates a number of phases to be activated based on a load current. The processing unit also stores a threshold current limit corresponding to each phase of the N phases based on the input voltage and a switching frequency.
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公开(公告)号:US12231045B2
公开(公告)日:2025-02-18
申请号:US18539346
申请日:2023-12-14
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Bikash Kumar Pradhan , Preetam Charan Anand Tadeparthy , Muthusubramanian Venkateswaran , Venkatesh Wadeyar , Siddaram Mathapathi
Abstract: A controller includes: a pulse-width modulation (PWM) circuit; a control loop; and a reference voltage controller. The control loop has: a feedback input adapted to be coupled to an output voltage of a power stage; a control loop output coupled to a PWM control input; and an operational amplifier with a first feedback input, a first reference input, and an amplifier output, the first feedback input connected to the feedback input, and the amplifier output coupled to the PWM control input. The reference voltage controller has a reference voltage output coupled to the first reference input, the reference voltage controller configured to adjust a reference voltage provided to the reference voltage output responsive to a dynamic error estimate based on error in the operational amplifier.
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公开(公告)号:US20240310455A1
公开(公告)日:2024-09-19
申请号:US18227149
申请日:2023-07-27
Applicant: Texas Instruments Incorporated
Inventor: Karthik Anyam , Preetam Charan Anand Tadeparthy , Mayank Jain , Dattatreya Baragur Suryanarayana , Charan Hemanth Kumar
IPC: G01R31/40
CPC classification number: G01R31/40
Abstract: An example apparatus includes: a phase circuit configured to receive a pulse of a pulse width module (PWM) signal; provide, after receiving the pulse, an output voltage to a load; exhibit a fault; in response to the fault corresponding to a first category, transmit a first code voltage in a current sense (CS) signal; in response to the fault corresponding to a second category, transmit a reference voltage in the CS signal; receive, after transmission of the reference voltage, a tristate voltage in the PWM signal; and transmit, after receiving the tristate voltage, a second code voltage in the CS signal based on a type of the fault and the second category.
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公开(公告)号:US20240039402A1
公开(公告)日:2024-02-01
申请号:US18376230
申请日:2023-10-03
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Naman Bafna , Muthusubramanian Venkateswaran , Mayank Jain , Vikram Gakhar , Vikas Lakhanpal , Preetam Charan Anand Tadeparthy , Pamidi Ramasiddaiah
Abstract: In some examples, a circuit includes a state machine. The state machine is configured to operate in a first state in which the state machine gates a pulse width modulation (PWM) signal provided for control of a power converter according to a first signal provided by a voltage control loop. The state machine is configured to operate in a second state in which the state machine gates the PWM signal according to a second signal provided by a current limit comparator. The state machine is configured to transition from the first state to the second state responsive to the second signal being asserted after the first signal is asserted in a switching cycle of the power converter. The state machine is configured to transition from the current state to the first state responsive to the first signal being asserted after the second signal in a switching cycle of the power converter.
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公开(公告)号:US11757351B2
公开(公告)日:2023-09-12
申请号:US17390539
申请日:2021-07-30
Applicant: Texas Instruments Incorporated
Inventor: Ammineni Balaji , Preetam Charan Anand Tadeparthy , Naman Bafna , Sreelakshmi Suresh , Cheng Wei Chen
Abstract: Described embodiments include a voltage regulator circuit comprising a first comparator having a first comparator input coupled to a waveform input source, a second comparator input coupled to an output voltage terminal and a first comparator output. There is a second comparator having third and fourth comparator inputs and a second comparator output, the third comparator input coupled to a voltage source configured to provide a voltage representing a current limit, and the fourth comparator input coupled to the output voltage terminal. There is also a state machine having a first state machine input coupled to the first comparator output, a second state machine input coupled to the second comparator output and a state machine output, wherein a state of the state machine is determined by the first and second comparator outputs, and the state machine output provides a PWM signal responsive to the state of the state machine.
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公开(公告)号:US11720159B2
公开(公告)日:2023-08-08
申请号:US16917423
申请日:2020-06-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Venkatesh Wadeyar , Vikas Lakhanpal , Preetam Charan Anand Tadeparthy
CPC classification number: G06F1/28 , G06F13/4282
Abstract: In described examples, a voltage regulator includes a processor. A register bank is coupled to the processor. A logic block is coupled to the processor and to the register bank. The logic block receives frames. The processor programs the logic block and the register bank based on at least one of the frames.
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公开(公告)号:US11682900B2
公开(公告)日:2023-06-20
申请号:US17339576
申请日:2021-06-04
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Rajesh Venugopal , Matthew John Ascher Schurmann , Preetam Charan Anand Tadeparthy , Rengang Chen
IPC: H02J1/10 , G06F1/3203 , H02M3/158
CPC classification number: H02J1/106 , G06F1/3203 , H02M3/158
Abstract: A system includes a first power stage circuit having a first PWM input, a first voltage input and a first power output. The first power stage circuit is configured to provide a first current at the first power output responsive to a PWM signal at the first PWM input, and configured to receive a voltage at the first voltage input. The system includes a second power stage circuit having a second PWM input, a second voltage input and a second power output. The second voltage input is coupled to the first voltage input, and the second power stage circuit is configured to provide a second current at the second power output responsive to the PWM signal at the second PWM input. The second power stage circuit is configured to receive the voltage at the second voltage input, the voltage representing an average of the first current and the second current.
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公开(公告)号:US20220231605A1
公开(公告)日:2022-07-21
申请号:US17152223
申请日:2021-01-19
Applicant: Texas Instruments Incorporated
Inventor: Scott Edward Ragona , Rengang Chen , Preetam Charan Anand Tadeparthy , Evan Michael Reutzel
Abstract: A converter stage having a control pin, an input voltage pin, an output pin, a ground pin, a high-side switch coupled between the input voltage pin and the output pin, a low-side switch coupled between the output pin and the ground pin, a current sensor configured to detect a current at the output pin, and control logic coupled to the control pin and the current sensor. The control logic is configured to control switching of the high-side and the low-side switches in continuous conduction mode, discontinuous conduction mode, and body braking control for the converter stage in response to a first signal received via the control line and a second signal received from the current sensor. A driver controls switching, based on the detected current and sequential event tracking, between an on state and an off state.
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